Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2001-08-06
2003-05-20
Smith, Matthew (Department: 2825)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S427000, C438S435000, C438S296000, C257S510000
Reexamination Certificate
active
06566225
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a method of forming shallow trench isolations, and more particularly to a method of forming shallow trench with reduction of micro-loading during formation and reduction of corner recess.
2. Description of the Prior Art
A drawback of conventional LOCOS is that it is susceptible to defects caused by the high stresses generated in the narrow active areas, underneath the nitride layer, during field oxidation. There are also defects caused by the KOOi effect. These defects can degrade the gate oxide quality and transistor performance. Defect generation is enhanced as the geometries shrink and the bird's beak encroachment becomes a more significant portion of the field oxide surface area. What is desired, therefore, is a means of forming an isolation region in a semiconductor substrate that does not have the drawbacks and shortcomings of conventional methods and/or known variations thereof, and that is useful for isolating integrated circuits devices (e.g. transistors) having a geometry (e.g. gate width) of 0.35 u.m. or less.
It is another method to isolate devices in an integrated circuit by using shallow-trench isolation. Generally, an anisotropic etching process is performed with using silicon nitride as a mask to form steep trenches on a semiconductor substrate. Then, by filling the trenches with oxide, shallow-trench isolations, which have top surfaces are in level with the top surface of the substrate, are formed on the substrate.
Unfortunately, for high integrated circuit, there is micro-loading effect during etching shallow trench structure. Such time-mode etching result in different control on the depths of the shallow trench structures. After formation of the shallow trench isolation, the problem of corner recess also degrades the performance of the shallow trench isolation.
However, there is a consideration to improve the characteristics of the shallow trench isolations during the formation thereof, and further reduce reliability degradation of the semiconductor device.
SUMMARY OF THE INVENTION
It is one object of the present invention to provide a formation method of shallow trench isolation. The depth of trench is easily controlled by the thickness of polysilicon instead of conventional time mode.
It is another object of the present invention to provide a formation method of shallow trench isolation. The polysilicon layer can prevent formation of trench from micro-loading and Kooi effect.
It is another object of the present invention to provide a formation method of shallow trench isolation. The oxidation of polysilicon during formation of liner layer of trench can prevent the trench from corner recess.
In the present invention, a formation method of a trench structure comprises forming a pad oxide layer on a substrate. A first polysilicon layer is formed on the pad oxide layer and an oxide layer is formed thereon. A second polysilicon layer is formed on the oxide layer. The partial second polysilicon layer, the oxide layer, the first polysilicon layer, and the pad oxide layer are removed to expose the partial substrate. The second polysilicon layer and the partial substrate are etched for forming the trench structure in the substrate. An etched depth of the trench structure is well controlled by the thickness of the second polysilicon layer. A liner layer is formed at the side-wall of the trench structure and simultaneously a side-wall oxide layer is at the side-wall of the first polysilicon layer. The side-wall oxide layer protects the trench structure against corner recess.
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Chen Hsin-Huei
Huang Yu-Ping
Lai Erh-Kun
Luu Chuong A
Macronix International Co. Ltd.
Smith Matthew
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