Format converting circuit for numeric data

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341 93, G06F 700

Patent

active

049358901

ABSTRACT:
A format converting circuit for numeric data comprises an operation unit which operates according to a mode decision signal to output an input data as it is or a two's complement of the input data; a storage device which stores a positive or negative sign data to be read out and is reset by an initializing signal to a positive data storing state; and a control circuit which operates in two conversion modes. One of the modes is a signed-to-unsigned conversion mode in which the control circuit controls the operation unit with the mode decision signal such that, if a sign bit of the input data is 0, the operation unit outputs the data as it is while, if the sign bit is 1, the operation unit outputs a two's complement of the input data. At the same time, the control circuit inverts the data stored in the storage device if the above-mentioned sign bit is 1. The other mode is an unsigned-to-signed conversion mode in which the control circuit controls the operation unit with the mode decision signal such that, if the data stored in the storage device is positive, the operation unit outputs the input data as it is while, if the data stored in the storage device is negative, the operation unit outputs a two's complement of the input data.

REFERENCES:
patent: 3786490 (1974-01-01), Hallock
patent: 3855459 (1974-12-01), Hakata
patent: 4038538 (1977-07-01), Semmelhaack et al.
patent: 4520347 (1985-05-01), Campbell, Jr.
patent: 4623872 (1986-11-01), Rainer
patent: 4709226 (1987-11-01), Christopher
Elliott et al., "Two's Complementor or Straight-Through Logic Arrangement,"IBM Tech. Discl. Bull., vol. 12, No. 11, 4/70, pp. 1978-1979.

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