Force page zero paging scheme for microcontrollers using data ra

Static information storage and retrieval – Addressing – Byte or page addressing

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365239, G11C 800

Patent

active

060552115

ABSTRACT:
A microcontroller architecture that adds a dedicated bit in the op-code decode field to force data access to take place on page 0 of the random access memory (RAM) for that instruction. This allows the user to have any page selected and still have direct access to the special function registers or the register variables which are located on page 0 of the RAM. The setting of the dedicated bit will not affect the current operation of the microcontroller nor will the setting of the bit modify the currently selected address stored in the op-code instruction currently being executed by the microcontroller.

REFERENCES:
patent: 5255382 (1993-10-01), Pawloski
patent: 5809327 (1998-09-01), Wollan et al.
patent: 5887189 (1999-03-01), Birns et al.

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