Static information storage and retrieval – Addressing – Byte or page addressing
Reexamination Certificate
2000-02-25
2001-03-06
Nelms, David (Department: 2818)
Static information storage and retrieval
Addressing
Byte or page addressing
C365S239000
Reexamination Certificate
active
06198691
ABSTRACT:
FIELD OF THE INVENTION
This invention relates generally to microcontrollers and, more specifically, to a random access memory paging scheme for a microcontroller that will allow a user to have any page selected in the random access memory of the microcontroller and still have direct access to special function registers or the register variables without modifying the page select register of a current instruction.
BACKGROUND OF THE INVENTION
Current microcontrollers, including PIC microcontrollers, use a random access memory (RAM) paging scheme to address all the data memory. This scheme is extremely cumbersome in that it takes several instructions to ensure that the user is writing or reading the proper address in RAM. It also complicates the job of the C-compiler since the C-compiler must keep track of which page is currently selected in RAM. This presents even more problems when handling interrupts.
In classic microcontroller architecture, increasing the op-code field to handle larger addresses would solve the address paging problem. However, increasing the op-code field has the disadvantage of increasing the size of the microcontroller and thus increasing the overall cost of the microcontroller. Another way to alleviate the RAM paging problem is to map all special function and register dedicated memory space that is available in every bank or page. This wastes precious RAM space since every location that is mapped takes up one general purpose RAM location in every bank. If the micro has eight (8) pages, seven (7) locations of RAM are wasted.
Therefore, a need existed to provide an improved microcontroller architecture and paging scheme. The improved microcontroller architecture and paging scheme must allow for direct access to special function registers. The improved microcontroller architecture and paging scheme must allow direct access to special function registers without modifying the page select register of the current instruction being used by the microcontroller. The improved microcontroller architecture and paging scheme must further allow for direct access to special function registers without increasing the size of the microcontroller.
SUMMARY OF THE INVENTION
In accordance with one embodiment of the present invention, it is an object of the present invention to provide an improved microcontroller architecture and paging scheme.
It is another object of the present invention to provide an improved microcontroller architecture and paging scheme that allows direct access to special function registers without modifying the page select register of the current instruction being executed by the microcontroller.
It is still another object of the present invention to provide an improved microcontroller architecture and paging scheme that allows direct access to special function registers without increasing the size of the microcontroller.
In one embodiment, the present invention provides a paging scheme for a microcontroller that uses data random access memory to allow tracking of a currently selected address in the random access memory. The method comprises the step of dedicating a bit in each op-code instruction of the microcontroller. When the bit is set, the bit forces data access to take place on a section of the random access memory storing special and general purpose registers while not affecting current operations of the microcontroller. Even when set, the dedicated bit will not modify the currently selected address stored in the page select register currently being used by the microcontroller. The method may further comprise the steps of: linearizing an entire address range of the random access memory; and dedicating a specific address section of the random access memory to the special and general-purpose registers. The specific address section that is so dedicated can be any page within the memory. This is a useful feature of the present invention as it enables the utilization of, for example, programs that must use specific portions of memory (for instance the first page (0) or the last page (f)).
In accordance with another embodiment, the present invention provides a microcontroller having forced page architecture. The microcontroller has a random access memory that has an entire linearized address range. The random access memory is divided into plurality of pages wherein one page is dedicated to special and general purpose registers. A dedicated bit in each op-code instruction of the microcontrollers is used to force data access to take place on a page of the random access memory that stores the special and general purpose registers. The setting of the dedicated bit will not affect the current operations of the microcontroller nor will the setting of the bit modify the currently selected address stored in the page select register currently being used by the microcontroller.
The foregoing and other objects, features, and advantages of the invention will be apparent from the following, more particular, description of the preferred embodiments of the invention, as illustrated in the accompanying drawings.
REFERENCES:
patent: 6055211 (2000-04-01), Yach
Baker & Botts L.L.P.
Lam David
Microchip Technology Incorporated
Nelms David
LandOfFree
Force page paging scheme for microcontrollers of various... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Force page paging scheme for microcontrollers of various..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Force page paging scheme for microcontrollers of various... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2537617