Force applying probe card and test system for semiconductor...

Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element

Reexamination Certificate

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C324S754090

Reexamination Certificate

active

06600334

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to testing of semiconductor dice contained on a wafer. More particularly, this invention relates to an improved probe card, and to a test method and test system employing the probe card.
BACKGROUND OF THE INVENTION
Semiconductor wafers are tested prior to singulation into individual die, to assess the electrical characteristics of the integrated circuits contained on each die. A typical wafer-level test system includes a wafer handler for handling and positioning the wafers, a tester for generating test signals, a probe card for making temporary electrical connections with the wafer, and a prober interface board for routing signals from the tester pin electronics to the probe card.
The test signals can include specific combinations of voltages and currents transmitted through the pin electronics channels of the tester to the prober interface board, through the probe card, and then to one or more devices under test on the wafer. During the test procedure response signals such as voltage, current and frequency can be analyzed and compared by the tester to required values. The integrated circuits that do not meet specification can be marked or mapped in software. Following testing, defective circuits can be repaired by actuating fuses (or anti-fuses) to inactivate the defective circuitry and substitute redundant circuitry.
One type of probe card includes needle probes for making temporary electrical connections with contacts on the wafer. Typically, these contacts are the bond pads on the individual dice. The probe card typically includes an insulating substrate, such as a glass filled resin. The substrate can include electric traces in electrical communication with the needle probes. In addition, the needle probes can be configured to make electrical connections with a specific die, or groups of dice, on the wafer. Typically, the wafer or the probe card is stepped so that the dice on the wafer are tested in sequence.
One aspect of these testing procedures is that the contacts on the wafer are typically coated with a metal oxide layer. For example, aluminum bond pads can be covered with an aluminum oxide layer that forms by oxidation of the underlying metal. The oxide layer is electrically non conductive, and provides a high degree of electrical resistance to the needle probes. In order to ensure accurate test results, the needle probes must penetrate the oxide layer to the underlying metal.
To penetrate oxide layers on the contacts, the probe card and wafer can be brought together until the needle probes touch the contacts. The probe card can then be overdriven a distance in the Z-direction (e.g., 3 mils) causing the needle probes to bend. As the needle probes bend, their tips move horizontally across the contacts, scrubbing through the oxide layers to the underlying metal. This scrubbing action also displaces some of the underlying metal causing grooves and corresponding ridges to form on the contacts.
This system works satisfactorily when the needle probes are properly adjusted. However, the tips of the needle probes can be misaligned in the Z-direction. Consequently, the needle probes may need to deflect by different amounts to physically engage the contacts on the wafer. The same situation can occur due to differences in the Z-direction location, or planarity, of the contacts on the wafer. If the needle probes cannot flex enough to compensate for Z-direction misalignment in the contacts, then the resultant electrical connections can be poor.
The contact force with which a needle probe presses into a contact, also depends on the amount of deflection in the needle probe. When the needle probes deflect by different amounts, the contact forces are different. This can affect the resistivities of the electrical connections and the test procedure.
Another shortcoming of needle probe cards, is the needle probes cannot be fabricated with a density which permits testing of high pin count devices having dense arrays of bond pads. For example, fabricating needle probes with a pitch of less than 6 mils has been difficult.
Also with needle probe cards, outside electrical connections with the needle probes can be difficult to make. In the past, soldered wires, wire bonds, or bonded polymer film have been used to make the electrical connections to the needle probes. Pin cards are typically required to electrically interface with the probe cards. These components are expensive to manufacture, and make changing and servicing of the probe cards more difficult.
In view of the foregoing, it would be advantageous to provide a probe card which can accurately probe dense arrays of closely spaced contacts on semiconductor wafers. It would also be advantageous to provide a probe card which is relatively simple to construct and maintain, and which can be easily replaced. Still further, it would be advantageous for a probe card to include probe contacts which can move in a Z-direction to accommodate vertical misalignment of contacts on the wafers.
SUMMARY OF THE INVENTION
In accordance with the present invention, an improved probe card for testing semiconductor wafers is provided. Also provided are testing systems, and testing methods employing the probe card. The probe card, simply stated, comprises: a substrate; an interconnect having contacts for making temporary electrical connections with contacts on the wafer; and a force applying mechanism for biasing the interconnect against the wafer with a desired force.
The force applying mechanism includes spring loaded electrical connectors, such as “POGO PINS”, which provide electrical paths to the interconnect. The electrical connectors also provide a biasing force for pressing the interconnect contacts against the wafer contacts. The biasing force is dependent on spring constants in spring components of the electrical connectors. The biasing force is also dependent on compression of the spring components resulting from overdriving the wafer in the Z-direction into the probe card.
In an illustrative embodiment, the interconnect comprises silicon, and the interconnect contacts comprise raised members having projections configured to penetrate the contacts on the wafer to a limited penetration depth. In alternate embodiments, the interconnect contacts comprise microbumps on a polymer film, or indentations configured to retain and electrically engage bumped contacts on the wafer.
In each of the embodiments, the interconnect is mounted to an interposer having a dense array of external contacts for engaging the spring loaded electrical connectors. The interposer slidably mounts to a mounting plate which attaches to the probe card substrate. The planar orientation of the mounting plate is adjustable to allow the interposer and interconnect to be leveled with respect to the wafer prior to a test procedure.
A test system constructed in accordance with the invention includes the probe card mounted to a conventional wafer handler. The wafer handler is adapted to align the contacts on the probe card to the contacts on the wafer, and to bring the wafer and probe card together with a desired amount of Z-direction overdrive. The test system also includes a tester having test circuitry in electrical communication with the interconnect contacts. The tester is adapted to transmit test signals through the interconnect contacts to the dice contained on the wafer, and to analyze resultant test signals.


REFERENCES:
patent: 3866119 (1975-02-01), Aredezzone et al.
patent: 4585991 (1986-04-01), Reid et al.
patent: 4795977 (1989-01-01), Frost et al.
patent: 4891585 (1990-01-01), Janko et al.
patent: 5049813 (1991-09-01), Van Loan et al.
patent: 5172050 (1992-12-01), Swapp
patent: 5177439 (1993-01-01), Liu et al.
patent: 5180977 (1993-01-01), Huff
patent: 5225037 (1993-07-01), Elder et al.
patent: 5424652 (1995-06-01), Hembree et al.
patent: 5517126 (1996-05-01), Yamaguchi
patent: 5521522 (1996-05-01), Abe et al.
patent: 5546405 (1996-08-01), Golla
patent: 5634267 (1997-06-01), Farnworth et al.
patent: 5678301 (1997-10-01), Gochnou

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