For shortening an instruction code length

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364DIG1, 364DIG2, 364259, 3642592, 3642604, 3642606, 3642607, 3642624, 36426281, 3649462, 3649511, 3649513, G06F 930

Patent

active

054407010

ABSTRACT:
Disclosed is a data processing apparatus comprising a decode device for decoding an instruction code including an operation code and two register designation codes and an instruction execution device for executing appropriate process according to the results decoded by the decode device, wherein the instruction execution device executes a first process when the two register designation codes are different from each other and executes a second process when they are equal.

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"Add Halfword Immediate and Test Instruction", by F. Rubin, IBM Technical Disclosure Bulletin, vol. 13, No. 5, Oct. 1970.

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