Folded lands and vias for multichip semiconductor packages

Details Folded lands and vias for multichip semiconductor packages Folded lands and vias for multichip semiconductor packages

2009-09-15

2011-12-06

Parekh, Nitin (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Lead frame

C257S673000, C257S784000, C257S778000, C257SE23047

Reexamination Certificate

active

08072051

ABSTRACT:
Semiconductor packages and methods for making and using the same are described. The semiconductor packages contain a lead frame that has been folded to create folded leads that form a customized array of land pads and vias. The lead frame contains both longer folded lead and shorter folded leads. The longer leads can be folded so that an upper part of the longer leads form vias, the lower part forms part of a land pad array, and a substantially flat part that is connected to a first die containing an IC. The shorter leads can be folded so that a lower part forms part of a land pad array and the short leads are connected to a second die containing in IC. The folded leads can be routed according to the requirements of each specific IC die to which they are connected and therefore can support multiple dies in the semiconductor package. Other embodiments are also described.

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