Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Outside periphery of package having specified shape or...
Reexamination Certificate
2002-11-12
2004-05-04
Clark, S. V. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Outside periphery of package having specified shape or...
C257S776000, C257S701000, C438S125000
Reexamination Certificate
active
06731000
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to an integrated power module, in particular to a folded flex bondwire-less multichip power package for high power densities.
BACKGROUND OF THE INVENTION
Applications demanding high-power conversion such as voltage regulators for microprocessors, automotive electronics and telecommunications have introduced a trend to achieve higher power densities at lower cost. Consequently, to meet future power density requirements, integrated power module solutions rather than traditional discrete solutions are required. Integration of power electronics components (e.g. devices, IC's, passives etc.) in a module format is, however, complicated by the presence in the module of a wide variety of materials.
Only recently, two commercial state-of-the-art multichip power packages for DC-DC power conversion have emerged, offering an integrated system solution.
A first kind of commercial package for voltage regulator applications involves a packaging architecture using ball grid array (BGA) technology. In a small footprint area of 11 mm×11 mm, a module using BGA technology houses, for example, two metal oxide semiconductor field-effect transistors (MOSFET's), a driver chip and a few passive components on a multilayer printed circuit board (PCB) substrate.
FIG. 1A
is a partial cross section of a package
101
of this kind, which includes a MOSFET
102
and a passive component
103
on a multilayer PCB
104
. Inside the package
101
, interconnections to the MOSFET
102
are made with wirebonds
105
, and copper traces
106
are connected to BGA solder bumps
107
on the back of the package
101
for board attachment. The connection to the BGA solder bumps
107
is by way of copper layers of the multilayer PCB
104
. Molding compound
108
fills the package
101
. The package thickness is 3 mm or greater.
A second commercial multichip package contains MOSFET's and an IC within an area of 10 mm×10 mm, providing an integrated solution for voltage regulators for microprocessors. The package is based on a design, which uses a leadframe etched into a substrate, such as the MicroLeadFrame™ (MLF) technology of Amkor Technology, Inc. of West Chester, Pa.
FIG. 1B
is a view of a package
109
using MLF technology, which includes a copper leadframe
116
on which a die
111
, attached with a die attachment material
112
to an exposed die paddle
113
, is mounted. Device interconnections inside the package are achieved with wirebonds
114
,
115
. The contacts (not shown) on the copper leadframe
116
are brought straight down to a PCB on which the package
109
is mounted. Molding compound
117
fills the package
109
. The thickness of the package is 0.9 mm or more.
Power MOSFET dies contain three terminals (gate, source and drain) and thus only require a few terminal connections at the package level. Multichip solutions, however, such as those of FIG.
1
A and
FIG. 1B
use, respectively, standard IC packages such as
132
-solder bump BGA and
68
-lead MLF. A
68
-lead MLF pin connection and board layout design for the second type of commercial package is shown in FIG.
2
A. In
FIG. 2A
the MLF package
201
comprises a split leadframe
202
and MLF pins
203
. In
FIG. 2B
a solder bump BGA package
204
has array of BGA solder balls
205
.
As can be seen, in particular, from FIGS
2
A and
2
B, these standard IC packages for power devices lead to a significant number of connection redundancies. Moreover, these designs have reached the limit of pitch requirement for board layout. For example, the lead connections for the commercial package using MLF technology require a pitch of 0.5 mm, which would be impossible to pattern on any copper plane thicker than 2 oz. Furthermore, complex lead connections and tight pitch requirements of these packages also complicate the thermal via design on the board, which is essential for proper thermal management.
Both presently available commercial packages use multiple wirebonds per device and IC interconnections to reduce the effects of high resistance of the wirebonds. Adding more parallel wires to reduce electrical resistance ultimately, however, reaches a limit (2-3 m&OHgr;) and the process becomes significantly expensive.
There are then several areas for improvement over the design of the commercial packages now available. The structure of the module can be adapted to provide better thermal management. The module can be made thinner. More devices can be accommodated. The expense of providing multiple wire bonds to reduce electrical resistance can be reduced or avoided. Assembly of the package can be simplified if the number of pin connections or leads is reduced.
Hence, objects of the present invention are, among other things, improved heat transfer, decreased thickness of multichip power modules, allowing increased integration of functionalities within a power module package, eliminating wirebonds, allowing a design without leads, and simplifying I/O pin connections.
These and still further objects of the present invention will become apparent upon considering the following detailed description of the present invention.
SUMMARY OF THE INVENTION
Therefore, the present invention provides an electronic assembly or module which includes a multichip semiconductor package based on a folded single-layer flex circuit, without a leadframe. Flipchip studbumped semiconductor power dies and IC dies are attached to a patterned flex substrate; extensions of the flex substrate are folded and attached to the backside of the dies for electrical and thermal contact. The entire package is plastic molded and only the copper contact pads at the bottom of the flex substrate are exposed for standard surface mount attachment to any board.
A flipchip studbumped semiconductor die is one in which the die is electrically connected, through a conductive “bump” on the die surface, to a package carrier so that the package carrier provides connection from the die to the package exterior. The package carrier may, for example, be a substrate or leadframe.
In the present invention, the studbumps provide very short and low resistance paths (less than 1 m&OHgr;) for the device interconnects. Moreover, package inductance of the devices with studbumps can be reduced to 0.1 nH compared to 1 nH for a wirebond. Hence, in high-frequency applications, the packages of the present invention generate significantly less noise than the state-of-the-art solutions.
The present invention significantly improves thermal management over that offered by the existing solutions. Devices in the package are attached to a continuous flex substrate. Unlike a split leadframe (shown in
FIG. 2A
for an MLF module), heat generated from an individual device mounted on a continuous flex substrate has a wider area for dissipation.
The present invention also allows double-sided cooling as a result of its three-dimensional package architecture. Power MOSFET's have drain connections on the backside of the dies. In conventional packaging approaches (e.g. BGA and MLF packages), the die is attached face-up on the substrate to allow for heat dissipation through the drain pads. Wirebonds used for attaching the source and gate pads (on the topside of the dies) provide only a limited channel to extract the heat from the die-topside. In an embodiment of the present invention, the devices are placed face down (flipchip) on the substrate with gold metal bumps on the source and gate, thus providing more immediate thermal dissipation paths to the board. The flex-substrate is also folded and attached to the drain contacts, thus adding another channel for heat dissipation to the substrate. Because of its three-dimensional construction, the package offers improved thermal dissipation from both sides of the devices in a very small board area. Heatspreaders may be attached to either or both sides of the package. At the same time, flipchip studbumps offer shorter interconnects, thus lowering resistance heating as well as parasitic noise compared to conventional wir
Bruning Gert
Haque Shatil
Clark S. V.
Keegan Frank
LandOfFree
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