Folded extended window field effect transistor

Details Folded extended window field effect transistor Folded extended window field effect transistor

1989-04-11

1990-05-01

Edlow, Martin H.

357 239, 357 233, 357 52, H01L 2978, H01L 2934

Patent

active

049223119

ABSTRACT:
A gate electrode having an insulating top layer as well as insulating sidewall spacers permits the source and drain regions to be electrically contacted through windows directly above the source and drain regions formed in a window pad layer. There is a conducting layer, termed a window pad layer, over portions of these regions. Because of the insulating top layer and sidewall spacers on the gate, the window may be misaligned with respect to the source and drain regions, and maybe even closer to the gate than are these regions, but electrical contacts to these regions are still obtained. The window pad layer may also be used as sublevel interconnect.

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IBM Technical Disclosure Bulletin, 26, pp. 4303-4307, Jan. 1984.

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