Semiconductor device manufacturing: process – Making passive device – Trench capacitor
Reexamination Certificate
2000-06-22
2002-07-09
Thomas, Tom (Department: 2811)
Semiconductor device manufacturing: process
Making passive device
Trench capacitor
C438S243000, C438S244000, C438S387000
Reexamination Certificate
active
06417063
ABSTRACT:
BACKGROUND
1. Technical Field
This disclosure relates to semiconductor devices and fabrication methods and more particularly, to a folded deep trench capacitor structure, which increases capacity for deep trench capacitors.
2. Description of the Related Art
In semiconductor memory devices, for example, dynamic random access memory (DRAM) devices, memory cells include capacitors for storing data. The data stored in the capacitors is read from and written to through bitlines. The memory cells need to maintain a relationship between the storage capacitor's capacitance and the bitline capacitance to maintain a sensible voltage difference between bitline and complement bitline voltages, that is, to distinguish between a ‘0’ and ‘1’ read from the storage capacitor. With further shrinking of minimum feature sizes, critical dimensions (CD) must be compensated for by maintaining a higher or at least equal storage capacity.
Storage capacitors may include deep trench capacitors. Deep trench capacitors provide the ability to extend deep into a substrate to provide adequate storage while minimizing the cost of layout area. One way of achieving the relationship of capacity between bitlines and deep trench capacitors with smaller CD's is by etching the trenches deeper or as deep as before with a smaller CD. This requires thicker resists for etching the deeper trenches, which makes the resist budget more critical and other procedures, like hard mask processes, have to be developed to accommodate deeper trenches. Further, critical dimensions must be maintained as large as possible to permit access to the smaller width of trench for processing. This makes the alignment budget more critical as well.
Therefore, a need exists for a deep trench capacitor structure, which increases the capacitance so that both width and depth dimensions could be relaxed, and the area occupied by deep trench is at least the same as the prior art.
SUMMARY OF THE INVENTION
A deep trench capacitor, in accordance with the present invention, includes a deep trench formed in a substrate having a storage node formed therein. A center node is capacitively coupled to the storage node. The center node is disposed within the deep trench and formed inside the storage node. A first buried strap is provided for accessing the storage node, and a second buried strap is electrically isolated from the storage node and formed in contact with the center node and a buried plate formed in the substrate surrounding the deep trench. The center node is formed to provide additional capacitive area to the deep trench capacitor.
In other embodiments, the center node and the storage node may have a nitride layer disposed therebetween. The center node may extend to a bottom of the deep trench. The first buried strap is preferably coupled to a transistor for enabling access to the storage node. The buried plate and the center node preferably represent a first capacitor plate of the deep trench capacitor, and the storage node preferably represents a second capacitor plate of the deep trench capacitor.
A method for forming a deep trench capacitor, in accordance with the invention, includes a node dielectric formed in a lower portion of the deep trench and a collar formed in an upper portion of the deep trench. The deep trench is filled with a conductive material to form a storage node. A center trench is formed into the storage node, and the center trench is centrally disposed within the storage node. A center node dielectric layer is then deposited in the center trench. The center trench is filled with the conductive material to form a center node separated from the storage node by the center node dielectric layer. A hole is formed to expose a portion of the center node and a portion of a substrate surrounding the deep trench, the hole also exposes a portion of the storage node. A dielectric cap is formed on the portion of the storage node exposed in the hole, and a conductive material is deposited in the hole to connect the center node to a buried plate surrounding the lower portion of the deep trench.
Another method for forming a deep trench capacitor with a center node includes forming a deep trench in a semiconductor substrate, lining the deep trench with a node dielectric layer, filling the deep trench with a conductive material, recessing the conductive material and removing the node dielectric layer from an upper portion of the deep trench to expose a portion of the substrate. A collar is formed in the upper portion of the deep trench on the exposed portion of the substrate and by partially refilling the trench with the conductive material a storage node is formed with a void which forms a center trench in the storage node. A center node dielectric layer is deposited in the center trench. The center trench is filled with the conductive material to form a center node. A hole is formed to expose a portion of the center node and a portion of the substrate, the hole also exposes a portion of the storage node. A dielectric cap is formed on the portion of the storage node exposed in the hole, and conductive material is deposited in the hole to connect the center node to a buried plate surrounding the deep trench.
In other methods, the step of forming a center trench into the storage node may include the step of etching the center trench into the storage node. The step of forming a center trench into the storage node may include the step of underfilling the deep trench with conductive material to form the storage node having the center trench provided therein. The step of forming a center trench into the storage node may include the step of forming the center trench to the bottom of the deep trench. The method may include the step of forming the buried plate surrounding the lower portion of the deep trench wherein the center node is coupled to the buried plate to form a first electrode of the deep trench capacitor.
In still other methods, the step of forming a dielectric cap on the portion of the storage node exposed in the hole may include the steps of depositing an oxide layer in the hole to cover the exposed portion of the storage node in the hole, thinning the oxide layer and depositing a nitride layer over the oxide layer. The method may include the step of removing portions of the oxide layer and the nitride layer to form the dielectric layer over the portion of the storage node. The method may further include the step of forming a buried strap for accessing the storage node.
These and other objects, features and advantages of the present invention will become apparent from the following detailed description of illustrative embodiments thereof, which is to be read in connection with the accompanying drawings.
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Luzar Mark
Petter Robert
Schlesinger Violetta
Braden Stanton
Infineon Technologies Richmond LP
Thomas Tom
Vu Quang
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