Folded analog signal multiplier circuit

Details Folded analog signal multiplier circuit Folded analog signal multiplier circuit

1997-08-11

1999-03-02

Mai, Tan V.

Boots, shoes, and leggings

G06G 716

Patent

active

058779744

ABSTRACT:
A four-quadrant analog signal multiplier circuit with a folded cascode differential input stage allows such circuit to be operated at lower power supply voltage potentials, while allowing the same transistor types to be used for both sets of input signals thereby providing for more closely matched input device characteristics and signal gains.

REFERENCES:
patent: 4586155 (1986-04-01), Gilbert
patent: 5115409 (1992-05-01), Stepp
patent: 5389840 (1995-02-01), Dow
Jaime Ramirez-Angulo and Sun Ming-Shen, "The Folded Gilbert Cell: A Low Voltage High Performance CMOS Multiplier", New Mexico State University, Department of Electrical and Computer Engineering, pp. 20-23, Aug. 1992.

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