Focal plane array integrated circuit with individual pixel signa

Details Focal plane array integrated circuit with individual pixel signa Focal plane array integrated circuit with individual pixel signa

1993-07-27

1999-07-20

Shalwala, Bipin H.

Television

Camera, system and detail

Solid-state image sensor

348308, 2502081, H04N 314, H04N 5335

Patent

active

059262176

ABSTRACT:
This is a monolithic infrared detector readout circuit for a capacitive sensing element 111 wherein a high gain preamplifier 115 is biased by a large bias element 113, e.g. on the order of 10.sup.12 ohms. The output of the preamplifier 115 is a band-limited by a low pass single-pole filter 117 having a high value resistive element 119, e.g. on the order of 10.sup.9 ohms, and then is clamped by a clamp circuit 131 to a stable reference in a manner that doubles the amplitude of the signal and minimizes low frequency bias shifts and fixed pattern noise. The output of the clamp circuit 131 is buffered by buffer 123 prior to being multiplexed by row address signals. The output from a multiplex switch 125 is then applied to the column line for output to a video circuit or the like.

REFERENCES:
patent: 4488052 (1984-12-01), Zappen et al.
patent: 4499497 (1985-02-01), Levine
patent: 4549215 (1985-10-01), Levine
patent: 4902894 (1990-02-01), Butler et al.
patent: 5043820 (1991-08-01), Wyles et al.
patent: 5144133 (1992-09-01), Dudley et al.

Affiliated with

Also associated with

Rating

Focal plane array integrated circuit with individual pixel signa does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Focal plane array integrated circuit with individual pixel signa, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Focal plane array integrated circuit with individual pixel signa will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1326197