Stock material or miscellaneous articles – All metal or with adjacent metals – Composite; i.e. – plural – adjacent – spatially distinct metal...
Reexamination Certificate
2002-11-25
2004-03-16
Dawson, Robert (Department: 1712)
Stock material or miscellaneous articles
All metal or with adjacent metals
Composite; i.e., plural, adjacent, spatially distinct metal...
C428S413000, C523S443000, C525S533000, C528S113000, C528S408000, C528S421000
Reexamination Certificate
active
06706417
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to fluxing underfill compositions useful for fluxing metal surfaces in preparation for providing an electrical connection and sealing the space between semiconductor devices [such as chip size or chip scale packages (“CSPs”), ball grid arrays (“BGAs”), land grid arrays (“LGAs”), flip chip assemblies (“FCs”) and the like, each of which having a semiconductor chip, such as large scale integration (“LSI”)], or semiconductor chips themselves, and a circuit board to which the devices or chips, respectively, are electrically interconnected. The inventive fluxing underfill compositions begin to cure at about the same temperature that solder used to establish the electrical interconnection melts.
2. Brief Description of Related Technology
Such CSPs, BGAs and LGAs improve the characteristics of the electronic device with which they are used while serving to protect semiconductor bare chips, such as LSIs. Ordinarily, the CSP/BGA/LGA assembly is electrically interconnected to a circuit board by use of solder. Solder, such as eutectic tin/lead solder (melting point, 183° C.) or lead/indium solder (melting point, 220° C.), are ordinarily used.
Solder serves to provide a contact pad for, for instance, metal terminals on the semiconductor device to join the integrated circuit to the substrate. Such solder bump interconnection technology was developed to eliminate the expense, unreliability, and low productivity of manual wire bonding. This technology has allowed considerable increase in throughput as well as interconnect density as it progressed to full population area arrays, and has vitiated the manufacturing hurdle of assembling the increasingly smaller sized microelectronic devices as we know them today.
However, when the resulting CSP/BGA/LGA circuit board structure is exposed to thermal cycling, mechanical stress or shock, the reliability of the solder connection between the circuit board and the CSP/BGA/LGA often becomes suspect. It has become common for the space between the CSP/BGA/LGA assembly and the circuit board to which the assembly is electrically interconnected to be filled with an underfill sealant in order to relieve stresses caused by thermal cycling by more closely matching the differences in coefficients of thermal expansion between the semiconductor device and the substrate, thereby improving heat shock properties and enhancing the reliability of the structure. In addition, an underfill sealant is often used to temper vibrational disturbances and physical stresses that may cause electrical disconnects.
Typically, during the solder electrical interconnection process, flux is placed on the solder, allowing the solder to make a secure electrical interconnection when exposed to elevated temperatures reached during a solder reflow cycle, a typical profile for which is depicted in
FIG. 2
, curve B. The semiconductor device is then aligned with the substrate and the solder is reflowed under such elevated temperature conditions.
In the past, after the solder reflow cycle, residue from the flux would be removed—in order to prevent semiconductor device corrosion—using organic- or aqueous-based solvents, depending on the nature of the flux. However, the narrow space between the semiconductor device and the substrate, renders flux residue removal difficult and time-consuming, requiring sophisticated and expensive cleaning systems. Many semiconductor device manufacturers would prefer to eliminate this step, provided that no increase of corrosions is introduced.
Accordingly, eliminating the flux residue removal step became an important consideration for semiconductor device manufacturers. And recent commercial interest has led to industry efforts to produce epoxy-based underfill sealants which are capable of fluxing the metalization and designed to cure during the solder reflow cycle.
Efforts in that regard have focused primarily on including the fluxing agent in the underfill sealant, which fluxing agent would probably be a “no-clean” fluxing agent.
In one such disconcerted effort, International Patent Publication No. WO 98/37134 refers to a no-flow underfill encapsulant for flip-chip technology. This encapsulant is based on epoxy resin(s), an anhydride hardener, an accelerator, a surfactant and a fluxing agent, and uses a viscosity-controlling agent, such as fumed silica, and a coupling agent. This encapsulant is reported to provide optimized flow and a curing reaction only after attaining the maximum solder bump reflow temperature of about 190-230° C.
U.S. Pat. No. 5,128,746 (Pennisi) describes a thermally curable adhesive having a fluxing agent for use in reflow soldering an electrical component and a substrate. This adhesive reportedly removes oxide coatings on the metalization of the electrical component, and the adhesive at least partially cures when heated to solder reflow temperatures. The adhesive includes a thermoset resin, a fluxing agent, and a curing agent that reacts with and cures the thermoset resin when the thermally curable adhesive is heated.
To date, epoxy curatives used in commercially available or known epoxy-based compositions ordinarily either require a post-cure heating step to cure the composition in this application, because the curing agents cure slowly, or the epoxy-based compositions are too reactive, and as a result gel prematurely, thereby resulting in electrical disconnects which is the case with compositions described in the '746 patent. While either of these events may not pose problems in some commercial applications, for fluxing underfill applications where self-alignment of a semiconductor device on a carrier substrate is planned to occur, premature gellation frequently causes a misalignment of the semiconductor/device substrate interface. Such misalignment triggers an electrical disconnect, thereby rendering the mounted electronic assembly inoperable. In addition, where the epoxy-based composition cures slowly, many microelectronics assemblers are reluctant to use a post-cure heating step, as such post-cure may raise temperatures to an extent that may compromise the integrity of the mounted electronic assembly as a whole, by destroying one or more semiconductor devices attached to the substrate, and also increases processing time and expense.
An alternative approach would be for microelectronics assemblers to alter the solder reflow profile. Such an alternative solder reflow profile, which has been promoted by certain material suppliers, known as the “volcano profile” (see
FIG. 2
, curve A), allows solder to reflow quickly in view of the aggressive temperature increase to the solder reflow temperature over a short period of time, without any zoning or staging of the temperature ranges. As a result, the semiconductor components are subjected to thermal shock which oftentimes may also compromise their integrity. While underfill sealants with fluxing capabilities may be developed to satisfy that profile as a practical matter, the volcano profile is believed to find little to no practical use in the assembly of microelectronics components, because it is not compatible with other applications that occur on the substrate. And, those underfill sealants with fluxing capabilities that had been offered for sale in the past are incompatible with the zoned solder reflow profile described above, resulting in microelectronic assemblies that fail to conduct electricity.
International Patent Application No. PCT/GB99/01236 speaks to a thermally curable adhesive composition which includes a crosslinkable thermosetting material and a chemical crosslinking agent having fluxing properties and exhibiting restricted or no thermosetting reactivity with the material without the action of a catalyst and/or heat. The composition is thermally curable when heated to temperature range extending from the liquidus temperature of the alloy Sn/Pb 60/40 up to the liquidus temperature of the alloy Sn/Pb 3/97 and in the presence of a catalyst for the crosslinking of the material with the
Bober Jeremy J.
Konarski Mark M.
Aylward D.
Bauman Steven C.
Dawson Robert
Henkel Loctite Corporation
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