Electrical connectors – Preformed panel circuit arrangement – e.g. – pcb – icm – dip,... – With provision to conduct electricity from panel circuit to...
Reexamination Certificate
2001-12-17
2004-08-03
Bradley, P. Austin (Department: 2833)
Electrical connectors
Preformed panel circuit arrangement, e.g., pcb, icm, dip,...
With provision to conduct electricity from panel circuit to...
C439S078000, C439S071000, C439S083000
Reexamination Certificate
active
06769923
ABSTRACT:
FIELD OF THE INVENTION
The present invention generally relates to the field of connectors, and particularly to signal pins designed for high frequency operation and their supporting structures in making an electrical connection between a grid array package and the board or substrate to which it mates.
BACKGROUND OF THE INVENTION
Miniaturization is a long term trend in electronics that has affected all component parts in electronics, including connectors. Connectors have been developed so as to reduce the pitch between terminals. In affixing an integrated circuit (IC) to a circuit board or substrate, ball grid arrays are often used. In a BGA package, spherical solder balls are positioned on electrical contact pads of a circuit substrate by an adhesive means such as solder melt. There is a need to shorten the signal length path on ball grid array (BGA) and pin ball grid array (PBGA) type packages for high speed chips of either digital or analog technology. A PBGA is a BGA using wire signal pins in place of solder balls.
Reliance on solder balls in BGA presents certain problems. Solder balls need to be very uniform in size so that all contact points are made and mechanical stress on the BGA package is minimized. Variations in size and shape may result in variations in electrical performance. Solder balls also represent a minimal surface area. As circuitry becomes faster, this becomes an impediment because currents tend to become concentrated at low skin depths of the conductor. To maximize current flow at high frequencies, it is important to maximize the cross section area having a limited skin depth so as to maximize current flow.
The inductance and capacitance of current ball grid array solder balls needs to be lowered to allow lower edge rate transitions and give a more controlled method of signal path impedance.
With the trends toward miniaturization and higher speed signal transmission, problems such as loss of transmitted signals, interference between signals or crosstalk and interference from extraneous signals occur along the signal path. Each electrical conductor acts as a transmission line having a certain characteristic impedance determined by its resistance, inductance, and distributed capacitance. At high frequency operation, reflections, resonances and standing wave phenomena may appear when there is a significant difference in the magnitudes of the characteristic impedances of the circuits connected to the signal path.
One solution to improving high frequency signal transmission for integrated circuits has been to dedicate certain pins for making ground connections. In certain cases, each signal pin used may have an associated adjacent pin used for a ground connection to minimize cross-talk problems. Substantial impedances may still exist in the ground connections and a greater number of connector pins are needed making this less than an optimal solution.
Crosstalk between signal paths increases with frequency and reduced spacing between signal contacts. When several bus lines are forced to share power and/ or ground pins, their current loops overlap. These overlapping current loops form a single-turn, loosely coupled transformer with multiple inputs and outputs. Any signal on one loop couples, through the transformer effect, onto all the others.
Parasitic capacitances may form between conductors separated by a dielectric material. Capacitance is measured by their relative ability, compared to a vacuum, to store energy, and is expressed in terms of a dielectric constant, with the value for a vacuum taken as unity. The dielectric constant, also called permittivity or relative dielectric constant &egr;
r
, is a measure of the ratio of the speed of an electromagnetic signal in free space to the speed of the signal in a material. The values of dielectric constant range from slightly more than 1 (since everything known in our universe travels at a speed of less than the speed of light in a vacuum) up to 100 or more.
As pins become smaller, their placement needs to be more delicate and precise. Current methods employing solder balls do not have the same need for delicate, precise placement. It is necessary for pin technology to align and stabilize the pins in a 3D array to the grid and PCB on which the chip will be mounted. The need concerns assembly as well as repair.
Therefore, it would be desirable to provide a signal pin which offers low inductance and low capacitance effects for high speed operation in which the pin is mounted in a support which provides stability, spacing, rigidity, flexibility, and durability.
SUMMARY OF THE INVENTION
Accordingly, the present invention is directed to a fluted signal pin and its support structures.
In a first aspect of the present invention, a signal transmitting member for integrated circuit package has a central elongated body and at least one flute which extends from the central elongated body. The flute provides greater surface area to effectively decrease the resistance of the signal transmitting member at high frequency operation. Fluting also offers reduced signal pin inductance and capacitance with improved manufacturing process capabilities. The fluted surface of the pin increases the high frequency skin surface conduction area by lowering the inductance and capacitance. The decreased overall pin diameter and pin-to-pin spacing as compared to a standard solder ball lowers the pin-to-pin capacitance. This allows high frequency, reduced signal edge rate, digital signals or improved high frequency analog signal performance.
In a second aspect of the present invention, a support member for holding signal pins between an integrated circuit package and a circuit board or substrate has a main body made of an insulating material and holes in the main body for allowing passage of the signal pins. The support member may be a membrane to hold signal pins in a precise array that will allow an automated or manual attachment of signal pins to BGA or PBGA (pin ball grid array) packages. The support member may be a cylindrical braced pin array which allows the construction of PBGA packaging with wired signal pins for signal conduction and connection between BGA/ chip substrate and circuit board.
In a third aspect of the present invention, there is a circuit structure. In the circuit structure are an integrated circuit package such as a pin ball grid array or ball grid array package, signal pins, and a circuit board or substrate. In the circuit structure, either the signal pin is supported by a support member or the signal pin is fluted.
In a fourth aspect of the present invention, a signal transmitting pin between an integrated circuit package and a circuit board substrate is shaped so as to present an increase in surface area over a purely cylindrical or tapered cylindrical shape so as to minimize inductive and capacitive effects at high frequency operation.
It is to be understood that both the forgoing general description and the following detailed description are exemplary and explanatory only and are not restrictive of the invention as claimed. The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate an embodiment of the invention and together with the general description, serve to explain the principles of the invention.
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patent: 6224399 (2001-05-01), Yacoub
patent: 6551112 (2003-04-01), Li et al.
Bradley P. Austin
Hammond Briggitte R.
LSI Logic Corporation
Suiter - West PC LLO
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