Fluorine depleted adhesion layer for metal interconnect...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration

Reexamination Certificate

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C257S758000, C257S762000

Reexamination Certificate

active

08039964

ABSTRACT:
A line trough and a via cavity are formed within a dielectric layer comprising a fluorosilicate glass (FSG) layer. A fluorine depleted adhesion layer is formed within the line trough and the via cavity either by a plasma treatment that removes fluorine from exposed surfaces of the FSG layer, or by deposition of a substantially fluorine-free dielectric layer. Metal is deposited within the line trough and the via cavity to form a metal line and a metal via. The fluorine depleted adhesion layer provides enhanced adhesion to the metal line compared with prior art structures in which a metal line directly contacts a FSG layer. The enhanced adhesion of metal with an underlying dielectric layer provides higher resistance to delamination for a semiconductor package employing lead-free C4 balls on a metal interconnect structure.

REFERENCES:
patent: 5821168 (1998-10-01), Jain
patent: 6127256 (2000-10-01), Matsuno
patent: 6448655 (2002-09-01), Babich et al.
patent: 6911378 (2005-06-01), Conti et al.

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