Coating processes – Electrical product produced – Integrated circuit – printed circuit – or circuit board
Reexamination Certificate
1999-09-01
2001-07-24
Bareford, Katherine A. (Department: 1762)
Coating processes
Electrical product produced
Integrated circuit, printed circuit, or circuit board
C427S424000, C427S427000, C118S314000, C118S316000, C216S013000, C205S145000, C205S137000, C134S036000
Reexamination Certificate
active
06265020
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to the manufacture of electronic devices, and more particularly, to the manufacture of printed circuit boards and other packaging devices having aperatures such as through-holes, buried vias, blind vias and the like. Methods of the invention include delivering various metallization and other solutions to a device substrate such as a printed circuit board substrate, and even more particularly, delivering the various solutions while the device substrate is passing through a conveyorized apparatus.
2. Background
In the manufacture of circuit boards and other electronic packaging devices, particularly in the manufacture of double-sided and multilayer printed circuit boards which contain through-holes, buried vias and blind vias, it is common practice to perform a series of steps whereby the through-holes, and vias are catalyzed by contact with a plating catalyst and metallized to provide electrical connection between the layers of the boards.
Multilayer boards are well-known and are generally comprised of two or more circuit layers, each circuit layer separated from another by one or more layers of dielectric material, which generally is a resin/prepreg composite. Circuit layers are formed from copper clad laminate. Printed circuits are then formed on the copper layers by techniques well known in the art, for example print and etch to define and produce the circuit traces. As referred to herein, the term “multilayer” printed circuit board is inclusive of both double-sided boards and boards with greater than two circuit layers.
One traditional method for fabricating multilayer boards comprises fabrication of separate innerlayers having circuit patterns disposed over their surface. A photosensitive material is coated over the copper surfaces of a copper clad innerlayer material, imaged, developed and etched to form a conductor pattern in the copper cladding protected by the photosensitive coating. After etching, the photosensitive coating is stripped from the copper leaving the circuit pattern on the surface of the base material. Following formation of the innerlayers, a multilayer stack is formed by preparing a lay up of the innerlayers, ground plane layers, power plane layers, etc., typically separated from each other by a dielectric prepeg (a layer containing glass cloth impregnated with partially cured material, typically a B-stage epoxy resin). The stack is laminated to fully cure the B-stage resin.
To electrically interconnect circuit layers within a multilayer board, apertures in the form of through-holes, buried vias and blind vias are formed. These apertures are usually processed by drilling or other means such as laser or plasma treatment. See Clyde F. Coombs, Jr.,
Printed Circuits Handbook
, Third Edition, pp.12.5-12.8 (1988). Buried vias are plated through holes connecting two sides of an innerlayer. Blind vias typically pass through one surface of the stack and pass into and stop within the stack.
Throughout the manufacture of printed circuit boards and other electronic packaging devices, a variety of solutions are applied to the device substrate.
Thus, for example, following drilling of the apertures and prior to metal plating, the boards typically require surface roughening and resin desmear of through holes and other apertures to provide electrical interconnection. The roughening and desmear treatment promotes enhanced bond strength and electrical performance of the metal subsequently deposited on the aperture surface. A variety of solutions are applied to the substrate to accomplish the roughening and desmear.
Then, once the circuit board substrate is ready for metal plating, a series of solutions are applied through a number of steps, which generally comprise: (1) treating the surface of the board with a catalyst composition solution to render it catalytically receptive to electroless metal deposition; (2) electroless deposition of a metal over the catalyzed surface by contacting the catalyzed surface with an electroless plating solution; and (3) electrodepositing a plating metal over the electroless metal coating, wherein the electroless metal deposit serves as a conductive surface thereby permitting the electrodeposition. See, for example, C. R. Shipley, Jr.,
Plating and Surface Finishing
, vol. 71, pp. 92-99 (1984); and
Metal Finishing Guidebook and Directory
, vol. 86, published by Metals and Plastics Publications, Inc. (1988).
Catalyst solutions usefuil in making the article surface receptive to electroless metal deposition are known in the art and are disclosed in numerous publications including U.S. Pat. No. 3,011,920, incorporated herein by reference. Typically, these solutions comprise palladium metal. Often these solutions are true or colloidal solutions containing palladium and tin compounds.
Methods also have been employed to avoid use of an electroless plating process. For example, “direct” (i.e. no initial electroless deposit) plating procedures have been used, which generally involve application of a catalyst solution and then direct electrolyic plating of the catalyzed surface. See, e.g. U.S. Pat. Nos. 3,099,608, 4,895,739, 4,919,768, 4,952,286, 5,108,786, and 5,071,517.
Regardless of whether electroless or “direct plate” metallization processes are employed, conveyorized processing of the electronic device substrate is typically employed, either with horizontal or vertical process equipment. That is, the device substrate is transported through a manufacturing processing line on a conveyorized transport system.
Vertical processing generally comprises conveyorizing the circuit board substrates in a horizontal path and vertically lowering the boards into treatment tanks or chambers for chemical processing. Such vertical processes typically use panel oscillation as a primary means of solution exchange, with some negligible solution movement achieved through filtering pumps.
Horizontal processing generally comprises conveyorizing the circuit board substrates in a horizontal path through a series of treatment tanks or chambers. Additionally, within the tanks, any one of a number of different fluid delivery devices may be employed. Recently, the industry has moved away from vertical techniques towards horizontal techniques because of the perceived benefits that horizontal techniques have over vertical techniques.
Regardless of the conveyorized equipment style, it is necessary in articles containing through-holes, vias or other aperatures to provide adequate solution movement throughout the through-holes and vias. This presents a particular challenge in horizontal process equipment.
SUMMARY OF THE INVENTION
We have now found new methods of effectively manufacturing articles, such as printed circuit boards and other electronic packaging devices containing aperatures such as through-holes, buried vias and blind vias. Methods of the invention can increase the Yield of plated through-holes and vias and increase the range of via sizes (based on via depth and aspect ratio) that may be effectively metallized.
More particularly, in a first aspect of the invention, we have found that the delivery of solufions at an angle of less than 90 degrees, and even more particularly, less than 70 or 60 degrees, with respect to the device substrate surface can result in improved metallization of the articles, especially improved metallization of aperature walls such as walls of blind vias, through holes and the like. Most preferable are delivery angles of approximately 45 degrees, which have been found to result in fluid flows that are parallel with the surface of the articles. Without being bound by any theory, it is believed that by providing a resulting flow that is parallel to the board surface, micro-turbulence is created within the vias. The micro-turbulence acts to pull air out of the vias, thereby eliminating voids and bubbles to improve the coverage within the vias.
Flow that is “parallel” with the article is to be understood, in accordance with this invention, to refer to flows that trav
Allardyce George R.
Bladon John J.
Oglesby David
Sinitskaya Inna
Bareford Katherine A.
Corless Peter F.
Edwards & Angell LLP
Frickey Darryl P.
Shipley Company L.L.C.
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