Flow control, latency control, and bitrate conversions in a...

Pulse or digital communications – Bandwidth reduction or expansion – Television or motion video signal

Reexamination Certificate

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Details

C375S240260

Reexamination Certificate

active

06330286

ABSTRACT:

BACKGROUND OF INVENTION
The referenced ′325 and ′326 applications cited and incorporated by reference herein address timing correction and frame synchronization in a splicer/switcher for bitstreams. The goal of splicing compressed bit streams is to change or transition from one compressed data source to a second compressed data source with minimal disruption in the decoded program, while maintaining bitstream compliance prior to, through and after the transition. Input streams are de-multiplexed to the Packetized Elementary Stream (PES) level before being processed by individual elementary stream type processors. Program video and audio are spliced at access unit (frame) boundaries, however video splicing is typically higher in priority than audio splicing which is typically dependent upon video splice timing. Lip sync between program video and audio is maintained through the splice point. A continuous flow of time stamped video and audio frames, without timing discontinuities, is maintained in the output stream.
The video splicing approach described in the referenced and incorporated ′325 and ′326 applications examines incoming streams to extract stream parameters that are used to determine stream entry and exit points and calculate values required by the outgoing stream. Exit points are found in the current output stream, e.g. a “FROM” stream, while entry points are found in the next output stream, e.g. a “TO” stream. Pre-selection of the TO stream from multiple possible input streams preferably limits the number of input processing circuits needed to two.
A time base correction process restamps the stream selected for output. A transport stream encoder maintains the output time base and re-multiplexes the PES streams into an Advanced Television Systems Committee (ATSC) compliant output stream. A frame synchronization feature adds or drops frames from the output stream as needed to maintain Video Buffering Verifier (VBV) buffer fullness or to reconcile differences between the input FROM and TO bitstream rates and the output stream rate. This feature provides for asynchronous inputs from remote or local sources.
Output stream flow control is provided to transition the output stream buffer levels and VBV delays to the values in the To stream. This permits the switch to replicate previously generated variable bit rate (VBR) stream data rates after a transition period from one stream to the next. It should be understood that the ability to utilize VBR streams is important to studios since they provide broadcasters with channel space, which can of course be used for opportunistic data channels that provide additional sources of revenue.
However, it has been recognized that adding and dropping frames for buffer control essentially changes the end-to-end delay, or latency, of the overall system. More particularly, when the remote clock frequency is consistently higher than the local clock frequency, the end-to-end system delay increases. When the remote clock frequency is consistently lower than the local clock frequency, the end-to-end system delay decreases. When the current value differs from the stored value for end-to-end delay by a value equal to one frame, and other external criteria are met, a frame is either dropped or added. As the buffer of the next output, e.g. corresponding to a preselected or TO stream, fills while awaiting a proper exit point in the FROM or current stream, there is the potential for this additional unpredictable change in end-to-end delay or latency. This is undesirable, and there is a need to eliminate this unpredictable and variable latency.
It is an object of the present invention to provide latency control whereby a variable latency generated by switching or transitioning between compressed data sources is reduced and systematically eliminated.
SUMMARY OF INVENTION
In a compressed domain digital communications system, a method for reducing a variable latency associated with a buffer and at least partially resulting from at least one splice between a FROM bitstream and a TO bitstream each including data corresponding to a plurality of frames, the method including: selectively deleting data corresponding to a select at least one of the frames from the buffer based upon the variable latency so as to reduce the variable latency when an amount of data corresponding to a number of frames present in the buffer is greater than a given number of frames; and, regulating a flow of data in the system to prevent an underflow condition in the system by effecting a repeat last frame command and prevent an overflow condition in the system by slowing a rate of transmission for the data associated with at least one of the frames in the TO bitstream.


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