Floppy disk controller with DMA verify operations

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Details

3642362, 3642423, 36424231, 3642683, 3642854, 364946, 3649521, 3642686, G06F 1300

Patent

active

053074769

ABSTRACT:
The present invention includes two variations of an apparatus which generate a version of the IORC* bus signal that is supplied to the read strobe input of a floppy disk controller that is asserted at the appropriate time during verify cycles between the floppy disk controller and a DMA controller. These designs allow an 82077 floppy disk controller to operate properly in FIFO mode when it is being used with software that does not require generation of this signal. The designs include use of a PAL and certain bus signal inputs to generate a signal which is asserted at the appropriate times during verify transfers. This signal is combined with the regular IORC* bus signal to produce the signal that is provided to the read strobe input of the floppy disk controller.

REFERENCES:
patent: 4473879 (1984-09-01), Tachiuchi et al.
patent: 4481578 (1984-11-01), Hughes et al.
patent: 4527237 (1985-07-01), Frieder et al.

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