Floating point unit data path alignment

Details Floating point unit data path alignment Floating point unit data path alignment

1995-06-30

1997-05-06

Mai, Tan V.

Boots, shoes, and leggings

364748, G06F 700, G06F 738

Patent

active

056277733

ABSTRACT:
A pipelined floating point processor including an add pipe for performing floating point additions described. The add pipe includes a circuit to predict a normalization shift amount from examination of input operands, a circuit to determine the "Sticky bit" from the input operands, and a rounding adder which adds a pair of operands and rounds the result in a single pipeline stage operation. The rounding adder incorporates effects due to rounding in select logic for a series of carry select adders. The adder also aligns the datapath to permit economical storage and retrieval of floating point and interger operands for floating point or conversions operations. The floating point processor also includes in the adder pipeline a divider circuit include a quotient register having overflow quotient bit positions to detect the end of a division operation.

REFERENCES:
patent: 5235533 (1993-08-01), Sweedler
patent: 5257215 (1993-10-01), Poon
patent: 5511016 (1996-04-01), Bechade

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