Floating point operaton throughput control

Details Floating point operaton throughput control Floating point operaton throughput control

1994-10-20

1997-04-22

Eng, David Y.

Boots, shoes, and leggings

3642633, 3649469, G06F 930

Patent

active

056236166

ABSTRACT:
A circuit and method degrades throughput of floating point operations within a computing system. At the time of manufacture a preprogrammed value is stored. This may be done, for example, using fusible links, separate metal layers, internal bonding pad selection, EPROM/OTP memory cells, ion milling, laser evaporation and external programming pins. When a floating point processor processes a floating point operation, operation of a main processor is delayed an amount corresponding to the preprogrammed value. For example, when the floating point processor processes a floating point operation, a counter begins to count. Operation of the main processor is delayed until the counter has counted to a number equal to the preprogrammed value. Upon the counter completing counting to a number equal to the preprogrammed value, normal operation of the main processor is resumed.

REFERENCES:
patent: 4987534 (1991-01-01), Sekiguchi
Donald Steiss, et al., A 65 MHz Floating-Point Coprocessor for a RISC Processor, ISSCCY1/Session 5/Microprocessors/Paper TA 5.3, 1991 IEEE International Solid-State Circuits Conference, p. 94.
Eric DeLano, et al., A High Speed Superscalar PA-RISC Processor, IEEE COMPCON, 1992, (0-8186-2655-0/92) pp. 116-120.

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