Floating point multiply-accumulate unit

Details Floating point multiply-accumulate unit Floating point multiply-accumulate unit

1998-08-20

2000-09-05

Malzahn, David H.

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

G06F 738

Patent

active

061157295

ABSTRACT:
A floating point unit 10 provides a multiply-accumulate operation to determine a result B+(A*C). The multiplier 20 takes several processing cycles to determine the product (A*C). Whilst the multiplier 20 and its subsequent carry-save-adder 26 operate, an aligned value B' of the addend B is generated by an alignment-shifter 34. The aligned-addend B' may only partially overlap with the product (A*C) to which it is to be added using an adder 44. Any high-order-portion HOP of the aligned-addend B' that does not overlap with the product (A*C) must be subsequently concatenated with the output of the adder 44 that sums the product (A*C) with the overlapping portion of the aligned-addend B'. If the sum performed by the adder 44 generates a carry then it is an incremented version IHOP of the high-order-portion that should be concatenated with the output of the adder 44. This incremented-high-order-portion is generated by the adder 44 during otherwise idle processing cycles present due to the multiplier 20 operating over multiple cycles.

REFERENCES:
patent: 5517438 (1996-05-01), Dao-Trong et al.
patent: 5751621 (1998-05-01), Arakawa
patent: 5757686 (1998-05-01), Nuffziger et al.
patent: 5790444 (1998-08-01), Olson et al.
patent: 5993051 (1999-11-01), Jiang et al.
patent: 5999960 (1999-12-01), Gerwig et al.

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