Floating point microprocessor with directable two level microins

Details Floating point microprocessor with directable two level microins Floating point microprocessor with directable two level microins

1986-08-28

1990-05-22

Eng, David Y.

Boots, shoes, and leggings

3642328, 364243, 3642433, 3642446, 364247, 3642476, 3642624, 3642627, 3642628, G06F 900, G06F 922, G06F 926, G06F 1300

Patent

active

049282239

ABSTRACT:
A microprocessor integrator circuit includes split nanocode memories which enables simultaneous execution of an arithmetic operation and an operand fetch for maximizing through-put. The circuit also includes a shared sequencing arithmetic logic unit which handles all microcode sequencing plus memory address sequencing. The circuit also provides nanocode sequencing which enables storage of constants and data in a microcode space which can include an off-chip writable control store. In addition, two level microcode is utilized to enable long routines to be vertically encoded without the overhead of a large number of read only memory outputs.

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