Floating point conversion device and method

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364748, G06F 700

Patent

active

051611171

ABSTRACT:
A high-speed floating point conversion apparatus and method are disclosed, with special reference to selectable conversion of "source" IEEE format numbers to any of the "destination" IBM, DEC, or SEL formats. In the preferred embodiment, the exponent is input to a shift control block. The exponent is converted to a different base, resulting in a remainder. The remainder of the exponent base conversion is input to the shift position control input of a shift register (preferably a barrel shifter) which has received the fraction (or mantissa) of the original floating point number. The fraction is shifted an amount necessary to compensate for the exponent's base conversion. The shift position control bits are available after a very short period of time, so that the shifting process of the barrel shifter is also completed quickly. The exponent and shifted fraction (or mantissa) are then input to format conversion units which format the data bitwise as necessary for a particular output format. Advantageously, clamping functions within the format conversion units handle special cases such as infinitites. From the format conversion units the converted data is steered to appropriate output buffers. In parallel with the floating point data conversion process occur such processes as tag and index processing.

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The Programmable Gate Array Data Book, Xilinx, Inc., San Jose, California, 1988, Chapter 2 (Product Specifications) and Chapter 6 (Applications).
Production Data, Texas Instruments, Inc., Dallas, TX, 1985, "SN54AS8838, SN74AS8838 32-Bit Barrel Shifters", pp. 2-523 through 2-532.

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