Floating point computation unit having means for rounding the fl

Details Floating point computation unit having means for rounding the fl Floating point computation unit having means for rounding the fl

1981-06-11

1984-08-28

Malzahn, David H.

Boots, shoes, and leggings

364745, 364749, G06F 748

Patent

active

044687486

ABSTRACT:
A floating point computation unit for use in a data processing system in which the mantissa processing means provides an overall computation result a portion of which represents the desired mantissa result. A carry-in bit is added to the least significant bit of the overall result and is propagated through the mantissa processing means so that it can be added to the least significant bit of the desired mantissa result to provide a rounding of such desired result.

REFERENCES:
patent: 4161784 (1979-07-01), Cushing et al.
patent: 4208722 (1980-06-01), Rasala et al.
patent: 4224676 (1980-09-01), Appelt
patent: 4229801 (1980-10-01), Whepple
patent: 4295203 (1981-10-01), Joyce
A Microprogrammed 16-Bit Computer, Advanced Micro Devices, Inc., pp. 16-17, 1976.

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