Floating-point calculator

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

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Details

C708S603000

Reexamination Certificate

active

06701337

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a floating-point calculator, and more particularly, to a floating-point calculator having three or more inputs.
2. Related Background Art
In three-dimensional computer graphics (3DCG), various kinds of computation are conducted to generate images. Especially in a phase of geometry arithmetic processing which is the phase of various kinds of processing such as movement of three-dimensional models, three-dimensional and four-dimensional matrix operations are executed frequently. Matrix operation is ascribed to operation of inner products, such as a×a+b×b+c×c and a×b+c×d+e×f, for example. Therefore, along with the progress of the speed of 3DCG processing, there is a demand for technologies capable of high-speed operation of inner products.
FIG. 1
is a block diagram showing a first configuration example of conventional floating-point calculators. This floating-point calculator is configured to execute operation of A+B×C of three operands A, B and C. Let exponents of these three operands A, B, C be Ea, Eb, Ec, and let their fixed-point parts be Fa, Fb and Fc. Inner products can be calculated by repeating the operation A+B×C.
The conventional floating-point calculator shown in
FIG. 1
includes: an adder
201
for adding the exponent Eb of the operand B and the exponent Ec of the operand C and obtaining an exponent Em of the result of multiplication B×C of the operands B, C; a subtracter
202
for subtracting the exponent Em from the exponent Ea and obtaining an exponent Ed for digit adjustment of the fixed-point part Fa; a selecting circuit
203
selecting one of the exponents Ea and Em having a larger value; a digit adjusting shifter
204
for calculating a fixed-point part Fsf adjusted in digit from the fixed-point part Fa, based on the exponent Ed; a multiplier
205
for conducting multiplication Fb×Fc of fixed-point parts Fb and Fc and obtaining a sum component fixed-point part Fs and a carry component fixed-point part Fcr; a preceding zero detecting circuit
206
for counting the number of preceding zeros resulting from the addition Fsf+Fs+Fcr of the fixed-point parts Fsf, Fs and Fcr and obtaining an exponent correction value En for normalization of the operation result; an adder
207
for calculating a fixed-point part Fad resulting from the addition Fsf+Fs+Fcr of the fixed-point parts Fsf, Fs and Fcr; a subtracter
208
for subtracting the exponent correction value En from one of the exponents Ea and Em having a larger value and obtaining an exponent Er of a normalized operation result; and a normalization shifter
209
for conducting a digit adjustment for normalization of the fixed-point part Fad on the basis of the exponent correction value En and obtaining a fixed-point part Fr as an operation result.
The conventional floating-point calculator shown in
FIG. 1
operates as explained below.
When exponents Ea, Eb, Ec and fixed-point parts Fa of three operands A, B, C are input, addition Eb+Ec of the exponents Eb and Ec are conducted by the adder
201
first, the exponent Em of the result of multiplication B×C of the operands B and C is obtained, and the exponents Em and Ea are input to the subtracter
202
and the selecting circuit
203
. In the subtracter
202
, subtraction *Ea-Em* of the exponents Ea and Em is conducted, and the exponent Ed for digit adjustment of the fixed-point part Fa is obtained. On the other hand, in the selecting circuit
203
, one of the exponents Ea and Em having a larger value is selected. The fixed-point part Fa and the component Ed are input to the digit adjustment shifter
204
. In the digit adjustment shifter
204
, digit adjustment of the fixed-point part Fa is conducted based on the exponent Ed, and the fixed-point part Fsf is obtained. On the other hand, in the multiplier
204
, multiplication Fb×Fc of the fixed-point parts Fb and Fc is conducted, and the result of the multiplication is calculated separately for the sum component fixed-point part Fs and for the carry component fixed-point part Fcr. These fixed-point parts Fsf, Fs and Fcr are input to the preceding zero detecting circuit
206
and the adder
207
. In the preceding zero detecting circuit
206
, addition Fsf+Fs+Fcr of the fixed-point parts Fsf, Fs and Fcr is conducted, the number of preceding zeros in the result of the addition is counted, and the exponent correction value En for normalization of the operation result is calculated. In the adder
207
, addition Fsf+Fs+Fcr of the fixed-point parts Fsf, Fs and Fcr is conducted, and the fixed-point part Fad is obtained as the result of the addition. One of the exponents Ea and Em having a larger value and the exponent correction value En are input to the adder
208
, and the fixed-point part Fad and the exponent correction value En are input to the digit adjusting shifter
209
. In the subtracter
208
, digit adjustment for normalization of the fixed-point part Fad is conducted based on the exponent correction value En, and the fixed-point part Fr is obtained as the result of operation. Obtaining the exponent Er and the fixed-point part Fr means obtaining the result of operation A+B×C. Inner products in a matrix operation are obtained by repeating these operations.
FIG. 2
is a block diagram showing a second configuration example of conventional floating-point calculator. This floating-point calculator is configured to execute operation A×B+C×D+E×F of six operands A, B, C, D, E and F. Let exponents of six operands A, B, C, D, E and F be Ea, Eb, Ec, Ed, Ee and Ef, and let their fixed-point parts be Fa, Fb, Fc, Fd, Fe and Ff. Three-dimensional inner products can be obtained at the same time by executing the operation A×B+C×D+E×F.
The conventional floating-point calculator shown in
FIG. 2
includes: an adder
301
a
for adding the exponent Ea of the operand A and the exponent Eb of the operand B, and obtaining an exponent ea as the result of multiplication A×B of the operands A and B; an adder
301
b
for adding the exponent Ec of the operand C and the exponent Ed of the operand D, and obtaining an exponent eb as the result of multiplication C×D of the operands C and D; and adder
301
c
for adding the exponent Ee of the operand E and the exponent Ef of the operand F, and obtaining an exponent ec as the result of multiplication E×F of the operands E and F; a maximum value detecting circuit
302
for detecting the maximum value of the exponents ea, eb and ec calculated by the adders
301
a
,
301
b
and
301
c
; a subtracter
303
a
for subtracting the maximum value of the exponents ea, eb and ec from the exponent ea, and obtaining the number of digits for digit adjustment; a subtracter
303
b
for subtracting the maximum value of the exponents ea, eb and ec from the exponent eb, and obtaining the number of digits for digit adjustment; a subtracter
303
c
for subtracting the maximum value of the exponents ea, eb and ec from the exponent ec, and obtaining the number of digits for digit adjustment; a multiplier
302
a
for multiplying the fixed-point part Fa of the operand A and the fixed-point part Fb of the operand B and obtaining the multiplication result fa; a multiplier
304
b
for multiplying the fixed-point part Fc of the operand C and the fixed-point part Fd of the operand D to obtain the multiplication result fb; a multiplier
304
c
for multiplying the fixed-point part Fe of the operand E and the fixed-point part Ff of the operand F to obtain the multiplication result fc; a digit adjusting shifter
305
a
for digit adjustment of the operation result fa of the multiplier
304
a
, based on the operation result of the subtracter
303
a
; a digit adjusting shifter
305
b
for digit adjustment of the operation result fb of the multiplier
304
b
, based on the operation result of the subtracter
303
b
; a digit adjusting

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