Floating point arithmetic two cycle data flow

Details Floating point arithmetic two cycle data flow Floating point arithmetic two cycle data flow

1989-01-13

1991-03-12

Malzahn, David H.

Boots, shoes, and leggings

364745, G06F 738

Patent

active

049998021

ABSTRACT:
A processor for performing floating point arithmetic operations is provided that includes a circuit that performs a first floating point arithmetic operation on a set of operands in a first cycle and a second floating point arithmetic operation on an operand and a result of the first floating point arithmetic operation during a second cycle. A control circuit is provided for, in a third cycle, transferring a result of the second floating operation to the first floating point circuit for a first floating point operation in a next successive cycle while rounding the result of the second floating point operation.

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