Floating point arithmetic system and method with rounding antici

Details Floating point arithmetic system and method with rounding antici Floating point arithmetic system and method with rounding antici

1984-03-19

1985-12-31

Malzahn, David H.

Boots, shoes, and leggings

364748, G06F 750

Patent

active

045625530

ABSTRACT:
A floating point arithmetic system with rounding anticipation including an arithmetic unit for arithmetically combining two mantissas; a carry circuit for determining whether the sum will overflow upon the addition of two mantissas and whether the difference will have a leading zero upon the subtraction of two mantissas; the subtrahend in subtraction and the augend in addition include guard, round, and sticky digits; a rounding circuit is responsive to the carry circuit for rounding the least significant digit of the sum when the sum will overflow and for designating for rounding the guard digit of the sum when the sum will not overflow, for designating for rounding the round digit of the difference when the difference will have a leading zero, and for designating for rounding the guard digit of the difference when the difference will not have a leading zero; and means for introducing to the arithmetic unit at the designated digit during the arithmetic combining of the two mantissas an amount equal to one-half the radix to effect the rounding during the arithmetic operation.

REFERENCES:
patent: 3842250 (1974-10-01), Anderson
patent: 4295203 (1981-10-01), Joyce
patent: 4338675 (1982-07-01), Palmer et al.
patent: 4442498 (1984-04-01), Rosen
patent: 4468748 (1984-08-01), Blav et al.

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