Floating point adder with pre-shifter

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36471508, G06F 738

Patent

active

049998005

ABSTRACT:
The exponent computation part of a floating point adder and subtracter operates at high-speed. Prior to subtracting or adding of the mantissas, it is necessary to perform a computation on the exponents. The invention provides an exponent comparator and a pre-shifter responsive thereto for shifting the mantissa of at least one of the operands by at least one bit dependent on the comparison of at least the least significant bits of the exponents of the operands. The shift operation is carried out prior to the comparison of the most significant bits of the exponents of the operands. Once the most significant bits have been compared, the direction of final shifting can be determined and a further shift operation can be carried out, shifting either the unshifted or the pre-shifted mantissa by bit positions spaced in multiples of at least two.

REFERENCES:
patent: 4807172 (1989-02-01), Nukiyama
Earle et al., "Exponent Differences and Preshifter", IBM Tech. Disclosure Bulletin, vol. 9, No. 7, Dec. 1966, pp. 848-849.

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