Floating orthogonal line structure for X-Y wiring planes

Details Floating orthogonal line structure for X-Y wiring planes Floating orthogonal line structure for X-Y wiring planes

1989-07-24

1991-04-09

Hille, Rolf

357 40, 357 51, H01L 2348, H01L 2946, H01L 2954

Patent

active

050069187

ABSTRACT:
Far-end noise caused by coupling between active and quiet signal lines of wiring planes of an integrated circuit chip or chip carrier is reduced by providing floating crossing lines in wiring layers in an X-Y wiring plane pair.

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patent: 4825280 (1989-04-01), Chen et al.
patent: 4845538 (1989-07-01), Hazani
IBM Technical Disclosure Bulletin, vol. 28, No. 10, Mar. 1986, p. 4618, Reduced Coupled Noise Technique for Engineering Changes.
IBM Technical Disclosure Bulletin, vol. 17, No. 5, Oct. 1974, p. 135, FET Stray and Coupling Capacitance Equalization Technique, G. Sonoda.
IBM Technical Disclosure Bulletin, vol. 27, No. 11, Apr. 1985, p. 6578, Programmable Line Width and Ground Plane for Thin Film Module Package.

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