Electric lamp and discharge devices: systems – Periodic switch in the supply circuit – Periodic switch cut-out
Reexamination Certificate
1999-08-20
2001-04-17
Wong, Don (Department: 2821)
Electric lamp and discharge devices: systems
Periodic switch in the supply circuit
Periodic switch cut-out
C315S224000, C315S307000, C315S244000
Reexamination Certificate
active
06218788
ABSTRACT:
FIELD OF INVENTION
The present invention relates to a ballast, or power supply circuit, for gas discharge lamps of the type using regenerative gate-drive circuitry to control a pair of serially connected, complementary conduction-type switches of a d.c.-a.c. inverter. More particularly, the invention relates to directly driving switches using a single low-voltage integrated circuit configured with a floating ground design.
BACKGROUND OF THE INVENTION
Phase-controlled dimmable ballasts have gained a growing popularity in industry due to their capability for use with photo cells, motion detectors and standard wall dimmers.
Dimming of fluorescent lamps with class D converters is accomplished by either regulating the lamp current, or regulating the average current feeding the inverter. For cold cathode fluorescent lamps (CCFLs), the pulse width modulating (PWM) technique is commonly used to expand a dimming range. The technique pulses the CCFLs at full rated lamp current thereby modulating intensity by varying the percentage of time the lamp is operating at full-rated current. Such a system can operate with a closed loop or an open loop system. The technique is simple, low cost, and a fixed frequency operation, however, it is not easily adapted to hot cathode fluorescent lamps. For proper dimming of hot cathode lamps, the cathode heating needs to be increased, as light intensity is reduced. If inadequate heating exists, cathode sputtering increases as the lamp is dimmed. Also, the lamp arc crest factor should be less than 1.7 for most dimming ranges, in order to maintain the rated lamp life. The higher the crest factor, the shorter will be the life of the lamp. The PWM method does not address these problems, and therefore so far has been limited to CCFL applications.
Class D inverter topology with variable frequency dimming has been widely accepted by lighting industry for use as preheat, ignition and dimming of a lamp. The benefits of such a topology include, but is not limited to (i) ease of implementing programmable starting sequences which extend lamp life; (ii) simplification of lamp network design; (iii) low cost to increase lamp cathode heating as the lamp is dimmed; (iv) obtainable low lamp arc crest factor; (v) ease of regulating the lamp power by either regulating the lamp current or the average current feeding the inverter; and (vi) zero voltage switching can be maintained by operating the switching frequency above the resonant frequency of the inverter.
Conventional class D circuits which are used for d.c.—to—d.c. converters or electronic ballasts, implement a two-pole active switch via two, n-channel devices or n-p-channel complementary pairs. A gate is voltage controllable from a control-integrated circuit (IC), which is normally referenced to ground, thus, the control signals have to be level shifted to the source of the high-side power device, which, in class D applications, swings between two rails of the circuit. The techniques presently used to perform this function are by either, transformer coupling or a high-voltage integrated circuit (HVIC) with a boot-strapped, high side driver. Either solution imposes a severe cost and performance penalty.
For transformer coupling, the transformer needs to have at least three isolated windings wound on a single core, adding to cost and space considerations. The windings need to be properly isolated to prevent breakdown due to the presence of high potential. Also, the gate's drive circuit needs to be damped and clamped to prevent ringing between leakage inductors of the transformer and parasitic capacitors of switching MOSFETs.
In the case of high-voltage integrated circuits (HVIC), the HVIC has two isolated output buffers and logic circuitry which is sensitive to negative transients. The high-voltage process for the IC increases the size of the silicon die, and the boot-strap components add to the part count and costs. Such a system is also severely limited as to the switching frequency obtainable, which commonly is less than 100K Hz. Consequently, it uses the large sizes of EMI filters and resonant components and requires larger space for implementation.
In incandescent lamp dimming systems, dimming is controlled by a phase dimmer, also known as a triac dimmer. A common type of phase dimmer, blocks a portion of each positive or negative half cycle immediately after the zero crossing of the voltage. The clipped waveform carries both the power and dimming signal to the loads. The dimmer replaces a wall switch which is installed in series with a power line.
It would be desirable to use existing phase dimmer signals for dimming of compact fluorescent lamps (CFL). It would also be desirable to have such a system use a single-stage design for dimming and interfacing with a phase dimmer, provided at a low cost, with a direct gate drive for both high and low side MOSFET switches, with minimal voltage and current stresses on a resonant circuit. Still a further desirable aspect is to have a circuit which would allow programmable starting sequences to extend a lamp life, allow for low lamp arc crest factors and zero voltage switching over wide ranges. Such a system should also include compact size with low component counts and be easily adapted for different line input voltage and powers and provide for adequate protection for abnormal operations. The present invention provides the foregoing advantages, as well as others.
SUMMARY OF THE INVENTION
In an embodiment of the present invention, a dimmable ballast circuit is designed to receive a phase dimmer signal to control output of a fluorescent lamp, the dimming ballast includes an input section configured to receive the phase dimmer signal. The system includes a low cost integrated chip having an internal operational amplifier with a non-inverting input tied to a steady-state input within the integrated chip, a totem pole output. The IC is also configured in a floating ground arrangement. A coupling capacitor is connected at one end of the output of the controller IC. A switching network is designed with a pair of complementary connected switches, and is also connected to receive the output from the IC through a second end of the coupling capacitor. A current-sensing resistor is used to sense the switching current of a power switch in order to generate a feedback signal. A level shifter is designed to receive a signal from the input section, and to shift the received signal from a level of the reference ground to a level of the floating ground, the level shifted signal and the feedback signal are summed, and the summed signal is supplied to the inverting input of the integrated chip. In this manner, an error signal, the difference between two signals, is supplied to the inverting input, thereby adjusting output of the operational amplifier to regulate the output of the light level.
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Chen Timothy
Nerone Louis R.
Fay Sharpe Fagan Minnich & McKee LLP
General Electric Company
Lee Wilson
Wong Don
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