Floating gate nonvolatile memory circuits and methods

Details Floating gate nonvolatile memory circuits and methods Floating gate nonvolatile memory circuits and methods

2005-11-01

2005-11-01

Phung, Anh (Department: 2824)

Static information storage and retrieval

Powering

C365S185010, C365S185090, C365S185140, C365S185260, C365S185290

Reexamination Certificate

active

06961279

ABSTRACT:
A non-volatile memory element is operated, in part, in two phases. During the first phase, a voltage is applied to a first node coupled to the nonvolatile memory element to generate an initial voltage. During the second phase, a voltage is coupled through at least one capacitor to charge pump the initial voltage to a level sufficient for programming or erasing the non-volatile memory element.

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