Floating gate memory with substrate band-to-band tunneling induc

Details Floating gate memory with substrate band-to-band tunneling induc Floating gate memory with substrate band-to-band tunneling induc

1998-03-13

1999-12-28

Nelms, David

Static information storage and retrieval

Floating gate

Particular biasing

36518518, 36518527, G11C 1604

Patent

active

060090170

ABSTRACT:
A new flash memory cell structure and operational bias approach for allowing programming operations significantly faster than prior approaches, is based on the use of band-to-band tunneling induced hot electron injection in cells to be programmed and on the use of triple-well floating gate memory structures. The method comprises inducing band-to-band tunneling current from the semiconductor body to one of the source and drain near the channel, and applying a positive bias voltage to the control gate to induce hot electron injection into the floating gate. The other of the source and drain terminals is floated, that is disconnected so that current does not flow through that terminal. The band-to-band tunneling current is induced by applying a reference potential to one of the source and drain sufficient to establish conditions for the band-to-band tunneling current. For example, a reference potential of approximately 0 volts is applied to the drain, and negative bias of about -4 volts to -8 volts is applied to the semiconductor body, and a positive voltage is applied to the control gate which falls in a range of about +6 volts to about +10 volts.

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