Floating gate memory with improved dielectric

Details Floating gate memory with improved dielectric Floating gate memory with improved dielectric

1983-02-23

1986-09-23

Moffitt, James W.

Static information storage and retrieval

Floating gate

Particular biasing

G11C 1140

Patent

active

046139567

ABSTRACT:
The dielectric between the floating gate and the control gate, in an EEPROM or other floating gate memory is made by forming an oxide
itride stack over the (first polysilicon) control gate. This dielectric not only provides a very high specific capacitance, which is desired to provide tight coupling of the control to the floating gate, but also provides excellent dielectric integrity. Moreover, the thickness of this dielectric layer does not exhibit any uncontrolled increase during exposure to second gate oxidation. Thus, the polysilicon-to-polysilicon dielectric is not only of high specific capacitance and high integrity, it is also very uniform.

REFERENCES:
patent: 3895360 (1975-07-01), Cricchi et al.
patent: 4340953 (1982-07-01), Iwamura et al.
patent: 4446536 (1984-05-01), Rodgers

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