Floating gate memory device with improved reference current...

Details Floating gate memory device with improved reference current... Floating gate memory device with improved reference current...

2008-03-26

2009-10-06

Phung, Anh (Department: 2824)

Static information storage and retrieval

Floating gate

Particular biasing

C365S185210

Reexamination Certificate

active

07599221

ABSTRACT:
A non-volatile semiconductor memory device is provided with: a first memory cell including a floating gate transistor; a first bitline connected to a diffusion layer which is used as a source of the first memory cell; a second bitline connected to a diffusion layer which is used as a drain of the first memory cell; a first reference cell including a floating gate transistor; a third bitline electrically isolated from the first bitline and connected to a diffusion layer which is used as a source of the first reference cell; a read circuit identifying data stored in the first memory cell in response to a memory cell signal received from the first memory cell through the second bitline and a reference signal received from the first reference cell through the fourth bitline; and a bitline level controller controlling a voltage level of the third bitline.

REFERENCES:
patent: 5754475 (1998-05-01), Bill et al.
patent: 6226213 (2001-05-01), Chih
patent: 6304486 (2001-10-01), Yano
patent: 7263004 (2007-08-01), Chen
patent: 08-190797 (1996-07-01), None

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