Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver
Reexamination Certificate
2000-05-12
2002-02-26
Callahan, Timothy P. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Signal converting, shaping, or generating
Current driver
C327S379000, C327S381000, C326S022000, C326S080000
Reexamination Certificate
active
06351158
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates generally to an apparatus and method for operating an integrated circuit. In particular, it relates to a MOS output driver that is powered by a 3.3v power supply and may be occasionally connected to a higher supply, such as 5v or more.
Complementary metal oxide semiconductors (CMOS) are ubiquitous in integrated circuits and systems. CMOS technology continues to shrink and as it shrinks the power supplies that operate the CMOS devices shrink accordingly. At present, many CMOS devices operate with a 3.3v power supply. However, these devices are often connected to peripheral devices in a system or even on the same chip that may operate or otherwise carry a higher voltage, such as 5v. If an output driver on a circuit is connected to a power supply that is greater than the output driver's normal power supply, the greater power supply may inadvertently turn on the driver when the system requires that the driver be off or otherwise in a quiescent or high-impedance state.
As explained later, others have provided solutions to this problem by controlling the voltage on the gate of the driving transistor, as well as controlling the voltage on the well of the driving transistor. If either of those voltages are not properly controlled, then one or more of the two body diodes in the drive transistor may turn on or the mosfet may itself turn on. See, in particular, U.S. Pat. No. 5,160,855 which shows a well voltage control circuit for controlling the voltage on the well of the drive transistor. The well voltage control circuit includes at least four transistors. However, I have found that the well control circuit does not adequately control the output transistor body when the output voltage is close to the value of the supply voltage during transmission.
The co-pending application discloses, inter alia, a novel well pull up circuit that operates with a conventional floating gate circuit. Experience has shown that conventional floating gate circuits have major limitations. For one, that often fail to timely turn off the output driver mosfets that drive the bus. This invention overcomes the deficiencies of the prior art circuit and provides a new floating gate circuit that is less complex and more reliable than conventional floating gate circuits.
SUMMARY OF THE INVENTION
The invention provides a bus driver that is less complex than the prior art and solves the problem of a floating gate voltage and a floating well voltage where output voltage is close to the value of the supply voltage during transmission. The invention provides a first output driver MOS transistor that has a source, an insulated gate, a body and a drain. This structure includes two inherent diodes. The drain and the body form one diode and the body and the source form the other. A low voltage supply terminal is connected to the source of the MOS transistor and the drain provides the output terminal. The gate terminal receives a gate voltage signal that turns the bus driver MOS transistor on or off. A floating gate control circuit is coupled to the gate and allows the gate to rise (in the case of the P-side driver) with the output voltage on the drain when the output voltage on the drain exceeds the primary supply voltage. This ensures that the normal mosfet conduction does not occur. The floating gate circuits also speed up turn off of the drive transistors and prevent leakage current that would backwards drive the driver circuit. The floating gate circuits included three transistors. Two are configured as an inverter circuit. The third transistor is connected between the two that form the inverter circuit. The third transistor has its well connected to its drain. It is on when the driver circuit is enabled and it discharges the gate of the driver transistor that is turning off. When the driver circuit is not enabled, the third transistor is always off and cannot be turned on. A well pull up circuit is connected to the floating gate control circuit, the body of the MOS transistor and to the primary supply terminal. The well pull up circuit lets the well float and thereby prevents its inadvertent operation of turning on one of the body diodes of the MOS transistor. An enable control circuit controls the well pull up circuit. The enable control circuit drives a high signal (in the case of the N-side driver circuit) during operation of the bus output driver and low when the bus is quiescent or high-impedance.
REFERENCES:
patent: 4972100 (1990-11-01), Lim et al.
patent: 5041746 (1991-08-01), Webster et al.
patent: 5149991 (1992-09-01), Rogers
patent: 5160855 (1992-11-01), Dobberpuhl
patent: 5319252 (1994-06-01), Pierrce et al.
patent: 5850153 (1998-12-01), Harris et al.
Graves Paul J.
Klein Peter G.
Shearon William B.
Callahan Timothy P.
Intersil America's Inc.
Jaeckle Fleischmann & Mugel LLP
Luu An T.
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