Floating gate capacitor for use in voltage regulators

Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics

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257299, 257312, H01L 2900

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active

06137153&

ABSTRACT:
A capacitor structure which exhibits a constant capacitance at non-negative voltages is provided by erasing a P-well floating gate NMOS transistor prior to its use as a capacitor. By erasing the transistor, a negative threshold voltage is obtained, thereby turning on the transistor and placing the transistor in an inversion state where the MOS capacitance is voltage-independent. Such transistors can be utilized as capacitors, whereby one plate of the capacitor corresponds to the control gate of the transistor and the other plate corresponds to the commonly connected source, drain, P-well, and deep N-well regions of the transistor, in voltage regulator circuits or other circuits in which node stabilization is desired. As a result, the capacitance is constant even at initialization when zero volts is applied.

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