Flip-flop with setting and sensing circuitry

Details Flip-flop with setting and sensing circuitry Flip-flop with setting and sensing circuitry

1975-05-12

1977-05-03

Zazworsky, John

Electrical transmission or interconnection systems

Nonlinear reactor systems

Parametrons

307238, 307247R, 328206, 340173FF, H03K 329

Patent

active

040216861

ABSTRACT:
A flip-flop comprising two, cross-coupled, transistors each having one end of its main conduction path connected to a common current source, and in which switching between states is accomplished by the application of voltages coupled through voltage dropping resistors connected to the other ends of the main conduction paths of the two transistors. The circuitry for applying the switching voltages includes an emitter-coupled logic (ECL) gate comprising a differential amplifier stage containing a pulse forming network for producing a sampling pulse at one output and a clocking signal at another output. The sampling pulse is "AND'ed" with input data signals to set the flip-flop to one binary condition and the clocking signal is used to reset the flip-flop to the other binary condition. Circuitry for sensing the state of the flip-flop includes a differential stage whose inputs are coupled to the control electrodes of the transistors of the flip-flop.

REFERENCES:
patent: 3764825 (1973-10-01), Stewart
patent: 3863229 (1975-01-01), Gershbach

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