Flip-flop with full scan capability

Details Flip-flop with full scan capability Flip-flop with full scan capability

1996-05-01

1997-09-16

Wambach, Margaret Rose

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

327404, H03K 3289

Patent

active

056684908

ABSTRACT:
A flip-flop with scan capability includes a four switches, a master stage, a slave stage and a scan-out logic gate. The flip-flop can operate in a functional mode, and a scan mode and receives a clock signal, a data signal, a scan clock signal and a scan-in signal. The flip-flop enters the functional mode when the clock signal runs free and the scan clock signal is held constant. The first switch receives the data signal and provides the data signal to the master stage for storage during a first part of a clock cycle. During a second part of the clock cycle, the third switch, connected between the master stage and the slave stage, closes, providing the data stored in the master stage to the slave stage and outputted as a q output signal. The flip-flop enters the scan mode when the clock signal is held constant and the scan clock signal runs free. The first switch is controlled to stay open by the constant clock signal. During a first part of a scan clock cycle, the second switch closes, providing the scan-in signal to the master stage. The data stored in the master stage is provided to the fourth switch, connected between the master stage and the scan-out logic gate. During a second part of the scan clock cycle, the fourth switch closes, providing the data stored in the master stage to the scan-out logic gate, which outputs a scan-out signal.

REFERENCES:
patent: 5444404 (1995-08-01), Ebzery
patent: 5463338 (1995-10-01), Yurash

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