Flip-flop phase detector circuit for phase locked loop

Details Flip-flop phase detector circuit for phase locked loop Flip-flop phase detector circuit for phase locked loop

1984-09-28

1986-06-03

Grimm, Siegfried H.

Oscillators

Automatic frequency stabilization using a phase or frequency...

Afc with logic elements

307516, 328133, 331 17, 331 25, H03D 1300, H03L 708

Patent

active

045932530

ABSTRACT:
A phase detecting arrangement includes an edge-triggered flip-flop phase detector which produces alternate logic 1 and logic 0 outputs in response to the arrival at respective detector inputs of set and re-set pulse transitions. These pulse transitions occur in pulse trains derived respectively, from external synchronizing signal generating means and a voltage-controlled oscillator the frequency of which is to be synchronized with that of the synchronizing signal. First and second sampling devices are associated with the phase detector for sampling the output from the detector when set and re-set transitions occur at inputs to the first and second sampling devices. Outputs from the sampling devices are suitably gated to produce an overall logic 1 or logic 0 output from the arrangement whereby an existing output from the arrangement is perpetuated when the phase detector output sampled indicates that at least two consecutive set or re-set pulse transitions have occurred without the intervention of an opposite type transition.

REFERENCES:
patent: 3383619 (1968-05-01), Naubereit et al.
patent: 4128811 (1978-12-01), Englund, Jr.

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