Flip-flop for scan test chain

Details Flip-flop for scan test chain Flip-flop for scan test chain

1997-01-07

1999-03-23

Trans, Vincent N.

Boots, shoes, and leggings

364489, 364488, 371 2231, 371 225, G01R 3128

Patent

active

058869018

ABSTRACT:
An method for designing integrated circuits for a serial scan test using an improved, modular flip-flop cell is presented. The modular flip-flop cell has a delay element strategically placed in the serial scan chain to reduce the occurrence of hold time violations. The delay element is located in a test path along the serial scan chain. The delay element causes the hold time of the test input terminal to be non-positive, ensuring that there are no hold time violations, while not affecting the time delay on the normal data path.

REFERENCES:
patent: 4879718 (1989-11-01), Sanner
patent: 4931722 (1990-06-01), Stocia
patent: 5056094 (1991-10-01), Whetsel
patent: 5329167 (1994-07-01), Farwell
patent: 5534789 (1996-07-01), Phillips et al.
patent: 5592493 (1997-01-01), Crouch et al.
patent: 5671234 (1997-09-01), Phillips et al.
patent: 5717700 (1998-02-01), Crouch et al.

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