Flip-flop circuits for testing LSI gate arrays

Details Flip-flop circuits for testing LSI gate arrays Flip-flop circuits for testing LSI gate arrays

1994-02-14

1995-08-08

Canney, Vincent P.

Excavating

371 225, H04B 1700

Patent

active

054405696

ABSTRACT:
A flip-flop circuit comprising serially connected flip-flops is associated with a combination circuit and configures a scanning circuit for performing a scanning operation in order to test the combination circuit in a test mode. In performing the scanning operation, the flip-flop circuit is preset or cleared and the preset or cleared data is scanned out through the scanning circuit so that the failure of an asynchronous system input circuit connected to a preset or clear terminal of the flip-flop circuit is detected.

REFERENCES:
patent: 4856002 (1989-09-01), Sakashita et al.
patent: 4870345 (1989-09-01), Ichiro et al.
patent: 5047710 (1991-09-01), Mahoney
patent: 5109383 (1992-04-01), Chujo

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