Flip flop circuit and method therefor

Details Flip flop circuit and method therefor Flip flop circuit and method therefor

1993-10-04

1995-04-18

Popek, Joseph A.

Miscellaneous active electrical nonlinear devices, circuits, and

Signal converting, shaping, or generating

Particular stable state circuit

365154, H03K 3289

Patent

active

054081386

ABSTRACT:
A storage cell circuit (11) comprises a voltage reduction circuit (17), a latch (18), and a tri-state driver circuit (19). The latch (18) has a terminal (14) and a terminal (16) for providing data stored therein. The voltage reduction circuit (17) couples to the power terminal of the latch (18) and reduces the voltage powering the latch. The tri-state driver circuit (19) has a clock input (12), a data input (13), a terminal coupled to the terminal (14), and a terminal coupled to the terminal (16). A clock signal applied to the clock input (12) has a first phase and a second phase. During the first phase of the clock, the terminals of the tri-state driver circuit (19) are at a high impedance leaving the data stored in the latch (18) undisturbed. During the second phase of the clock, the tri-state driver circuit (19) provides complementary signals of a data signal applied to the data input (13) for writing to the latch (18).

REFERENCES:
patent: 4656368 (1987-04-01), McCombs et al.
patent: 5049760 (1991-09-01), Ooms
patent: 5200650 (1993-04-01), Cowley et al.

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