Flip-flop circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

Patent

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Details

307482, 307578, 365203, 365205, H03K 326, H03K 17687, H03K 19094, G11C 700

Patent

active

046789340

ABSTRACT:
A flip-flop circuit has a power terminal set at 5 V, first and second output terminals, a latch section for charging one of the first and second terminals to 5 V and discharging the other one of the first and second terminals to 0 V in accordance with an input signal, a first MOS transistor having a current path connected between the power and first output terminals, a second MOS transistor for charging the gate of the first MOS transistor while the potential of the second output terminal is changed from 5 V to 0 V, and a capacitor for bootstrapping the gate potential of the first MOS transistor to turn on the first MOS transistor. The flip-flop circuit further includes a third MOS transistor, having a current path connected between the gate of the first MOS transistor and the first output terminal and a gate connected to the first output terminal, for charging the gate of the first MOS transistor when the gate potential of the first MOS transistor is dropped a predetermined level in comparison with that of the first output terminal.

REFERENCES:
patent: 4508980 (1985-04-01), Puar
patent: 4542306 (1985-09-01), Ikeda
patent: 4542310 (1985-09-01), Ellis et al.
patent: 4547685 (1985-10-01), Wong

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