Flip-flop

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Particular stable state circuit

Patent

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Details

327202, H03K 513, H03K 3289

Patent

active

061508616

ABSTRACT:
An improved flip-flop is disclosed. The flip-flop (12) includes a latch circuit (22) that receives an input signal and a clock signal. The latch circuit (22) generates an output signal that tracks the input signal during a first portion of the clock signal, and remains constant during a second portion of the clock signal. A master flip-flop (36) receives the clock signal and the output signal of the latch circuit, and generates an output signal that tracks the output signal of the latch circuit (22) during the second portion of the clock signal, and remains constant during the first portion of the clock signal. A slave flip-flop (48) receives the clock signal and the output signal of the master flip-flop and generates an output signal. The output signal tracks the output signal of the master flip-flop (36) during the first portion of the clock signal and remains constant during the second portion of the clock signal. The flip-flop may be incorporated into a shift register (10). The flip-flop provides automatic compensation for line delays in the clock signal without the need for custom-designed delays built into the clock signal lines.

REFERENCES:
patent: 5497114 (1996-03-01), Shimozono et al.
patent: 5525921 (1996-06-01), Callahan
patent: 5646567 (1997-07-01), Felix
patent: 5774003 (1998-06-01), Qureshi et al.
patent: 6002284 (1999-12-01), Hill et al.

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