Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Assembly of plural semiconductive substrates each possessing...
Reexamination Certificate
2005-05-10
2005-05-10
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Assembly of plural semiconductive substrates each possessing...
C438S123000, C438S128000, C438S129000, C438S309000, C438S612000, C438S666000
Reexamination Certificate
active
06890794
ABSTRACT:
A method of forming a flip chip device comprises providing a semiconductor die having a core area and a periphery area. The periphery area includes an electrostatic discharge (ESD) structure. The semiconductor die including includes at least one power conductor. A substrate having a source of power is provided. A first connection circuit is located within the semiconductor die core area to couple power between the substrate and the semiconductor die power conductor. The ESD structure is electrically coupled to the first connection circuit. The first connection circuit is electrically coupled to the substrate via a conductive bump.
REFERENCES:
patent: 4359754 (1982-11-01), Hayakawa et al.
patent: 4403240 (1983-09-01), Seki et al.
patent: 5384487 (1995-01-01), Rostoker et al.
patent: 5641978 (1997-06-01), Jassowski
patent: 5691218 (1997-11-01), Colwell et al.
patent: 5719449 (1998-02-01), Strauss
patent: 5767010 (1998-06-01), Mis et al.
patent: 5838072 (1998-11-01), Li et al.
patent: 5869870 (1999-02-01), Lin
patent: 5905639 (1999-05-01), Warren
patent: 5960262 (1999-09-01), Torres et al.
patent: 5986345 (1999-11-01), Monnot
patent: 6025616 (2000-02-01), Nguyen et al.
patent: 6043539 (2000-03-01), Sugasawara
patent: 6078068 (2000-06-01), Tamura
patent: 6091140 (2000-07-01), Toh et al.
patent: 6097098 (2000-08-01), Ball
patent: 6107681 (2000-08-01), Lin
patent: 6144093 (2000-11-01), Davis et al.
patent: 6169331 (2001-01-01), Manning et al.
patent: 6169772 (2001-01-01), Fourcroy
patent: 6211565 (2001-04-01), Yu
patent: 6222213 (2001-04-01), Fujiwara
patent: 6246113 (2001-06-01), Lin
patent: 6372627 (2002-04-01), Ring et al.
patent: 6489688 (2002-12-01), Baumann et al.
patent: 6495925 (2002-12-01), Lee et al.
patent: 6518089 (2003-02-01), Coyle
patent: 6570251 (2003-05-01), Akram et al.
patent: 6770982 (2004-08-01), Liou
patent: 20020180064 (2002-12-01), Hwan et al.
U.S. Appl. No. 10/051,965, filed Jan. 15, 2002, Liou.
U.S. Appl. No. 09/966,914, filed Sep. 27, 2001.
U.S. Appl. No. 10/138,119, filed May 2, 2002, Rotem, Eran.
U.S. Appl. No. 10/051,965, filed Jan. 16, 2002, Liou.
Marvell Semiconductor Israel Ltd.
Nelms David
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