Flip chip underfill process

Details Flip chip underfill process Flip chip underfill process

2005-03-01

2005-03-01

Quach, T. N. (Department: 2814)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

C438S118000, C438S613000

Reexamination Certificate

active

06861285

ABSTRACT:
A die with flip chip bumps including at least one layer of filled underfill on the die surface and a layer of unfilled underfill over the filled underfill and the flip chip bumps. An IC assembly including a substrate with bumps and at least one layer of filled underfill on the substrate surface and a layer of unfilled underfill over the filled underfill and the bumps. A die or IC assembly with a plurality of filled underfill layers with differing CTE. Methods of making the dies and IC assemblies.

REFERENCES:
patent: 5136365 (1992-08-01), Pennisi et al.
patent: 6121689 (2000-09-01), Capote et al.
patent: 6234379 (2001-05-01), Donges
patent: 6316286 (2001-11-01), Trezza
patent: 6335571 (2002-01-01), Capote et al.
patent: 6337265 (2002-01-01), Trezza et al.
patent: 20010051392 (2001-12-01), Akram
patent: 20020081772 (2002-06-01), Madrid et al.

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