Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With structure for mounting semiconductor chip to lead frame
Reexamination Certificate
2000-07-19
2003-12-09
Thomas, Tom (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Lead frame
With structure for mounting semiconductor chip to lead frame
C257S738000, C257S778000, C257S713000, C228S180220
Reexamination Certificate
active
06661082
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a chip device, and more particularly, to discrete power components such as MOSFETs, as well as ICs such as memory circuits that include a leadframe that includes a cavity for receiving the die.
2. Description of the Prior Art
Chip devices generally include a leadframe and a bumped die attached thereto. Many of the packages are multiple pieces and rely on wire bonding as the interconnect between the die and the package. Additionally, many BGA (ball grid array) substrates do not have the capability for solder balls to be pre-attached or for a cavity to be milled in the substrate to facilitate die attach.
These prior art packages limit the ability to form thin packages. Additionally, the manufacturing processes for these devices are inefficient.
SUMMARY OF THE INVENTION
The present invention provides a chip device that includes a die and a leadframe. The leadframe includes a die attach cavity. The die attach cavity is substantially the same thickness as the die. The die is positioned within the cavity and is attached therein with a standard die attachment procedure.
In accordance with one aspect of the present invention, a plurality of dimples is defined around the periphery of the leadframe the receives solder balls.
In accordance with another aspect of the present invention, the leadframe consists of a copper based alloy.
In accordance with a further aspect of the present invention, the leadframe includes a solderable coating.
The present invention also provides a method of making a memory device. The method includes providing a die and providing a leadframe that includes a die attach cavity. The leadframe includes a plurality of dimples defined around a periphery of the Leadframe. The die attach cavity has substantially the same thickness as the die. Solder balls are placed into the dimples. The die is flipped into the die attach cavity.
The resulting chip device has enhanced thermal performance since heat is dissipated from the face of the die (where it is generated) as well as from the bottom of the die due to its contact with the leadframe structure. The memory device also has a thinner package comparable to TSSOP stand-off, which is the current trend for miniaturization. The manufacturing process is simplified when compared to conventional assembly processes by eliminating such steps as wire bonding, molding, forming and plating.
Other features and advantages of the present invention will be understood upon reading and understanding the detailed description of the preferred exemplary embodiments, found hereinbelow in conjunction with reference to the drawings in which like numerals represent like elements.
REFERENCES:
patent: 5629835 (1997-05-01), Mahulikar et al.
patent: 6329713 (2001-12-01), Farquhar et al.
Granada Honorio T.
Joshi Rajeev
Tangpuz Connie
Fairchild Semiconductor Corporation
Owens Douglas W.
Townsend and Townsend / and Crew LLP
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