Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2006-10-04
2008-12-02
Pham, Hoai v (Department: 2892)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S108000, C257SE21499
Reexamination Certificate
active
07459339
ABSTRACT:
The objective of the invention is to provide a semiconductor device manufacturing method that can suppress the formation of voids in the underfill resin and realize a highly reliable flip-chip assembly. The semiconductor device manufacturing method pertaining to the present invention comprises the following processing steps: a step of operation in which a plurality of electrodes24, formed in a two-dimensional array on a principal surface22of semiconductor chip20, are connected to corresponding conductive regions32, 34on substrate30, a step of operation in which underfill resin40is supplied between the principal surface of the semiconductor chip and the substrate, and a step of operation in which the semiconductor chip and substrate with supplied underfill resin40are exposed to atmospheric pressure.
REFERENCES:
patent: 6841883 (2005-01-01), Farnworth et al.
patent: 7319049 (2008-01-01), Oi et al.
Brady III Wade James
Pham Hoai v
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
Tung Yingsheng
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