Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material
Reexamination Certificate
2000-07-13
2003-05-20
Fahmy, Wael (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Insulating material
C257S706000, C257S707000, C257S718000, C257S675000
Reexamination Certificate
active
06566748
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention generally relates to semiconductor devices and more particularly to a flip-chip semiconductor device in which a semiconductor chip is mounted on a substrate in a face-down state.
With increasing degree of device miniaturization in the field of semiconductor technology, there has been a need to provide a sufficient number of contact leads when the semiconductor device is assembled in the form of a semiconductor package.
In view of the foregoing needs, there is a BGA package structure in which a semiconductor chip carrying thereon bump electrodes in correspondence to the electrodes of the chip are mounted on a package substrate in a face-down state. The semiconductor chip thus flip-chip mounted on the package substrate is covered by a cap member, which functions also as a heat sink. The package substrate, on the other hand, carries further bump electrodes on a side thereof opposite to the side on which the semiconductor chip is flip-chip mounted, and the semiconductor device thus formed of the package substrate is mounted on a main substrate, which may be a printed circuit board of an electronic apparatus.
FIG. 1
shows the construction of a BGA semiconductor device
10
according to a related art.
Referring to
FIG. 1
, the semiconductor device
10
includes a package substrate
11
on which a semiconductor chip
12
is flip-chip mounted, such that bump electrodes
12
A typically of a Sn—Ag alloy and formed on the bottom surface of the semiconductor chip
12
make a contact engagement with a corresponding wiring pattern (not shown) provided on a top surface of the package substrate
11
. Further, bump electrodes
11
A are provided on a bottom surface of the package substrate
11
in electrical connection with the wiring pattern provided on the top surface, wherein the bump electrodes
11
A may be formed of a solder bump. The bump electrodes
11
A form a ball grid array on the bottom surface of the package substrate
11
.
The semiconductor chip
12
thus flip-chip mounted on the package substrate
11
is then covered by a cap member
13
, wherein the cap member
13
is thermally connected to the semiconductor chip
12
via a thermally conductive adhesive layer
13
A such as a silver paste. The cap member
13
thereby functions as a heat sink. The cap member
13
is also fixed to the top surface of the package substrate
11
mechanically by an adhesive layer
13
B such as an epoxy resin. Further, a resin layer
12
B, typically of an epoxy resin, fills the space formed between the bottom surface of the semiconductor chip
12
and the top surface of the package substrate
11
, in which space the bump electrodes
12
A make a contact engagement with the wiring patterns on the package substrate
11
. By filling the space with the resin layer
12
B, the reliability of electrical contact of the bump electrodes
12
A is improved.
It should be noted that the BGA semiconductor device
10
is then mounted on a main substrate
14
, which may be a printed circuit board of an electronic apparatus. Typically, the package substrate
11
is formed of a multilayer ceramic substrate or a multilayer resin substrate. On the other hand, the cap member
13
acting as the heat sink is formed of a thermal conducting material such as Cu, Al, Al—SiC or AlN.
In the device
10
of
FIG. 1
, a typical cap member
13
is formed of an Al—SiC composite having a Young modulus of 110 GPa. In this case, the thermal expansion coefficient of the cap member
13
has a value of 1.2×10
−5
/° C. In conformity with the thermal expansion coefficient of the cap member
13
, the package substrate
11
may be formed of a glass ceramic having a thermal expansion coefficient of 1.2×10
−5
/° C. The glass ceramic substrate
11
typically has a Young modulus of 70-75 GPa. On the other hand, the main substrate
14
is typically formed of a glass-epoxy resin and has a thermal expansion coefficient of 1.6-1.7×10
−5
/° C.
In the actual use of the BGA semiconductor device
10
in an electronic apparatus, the semiconductor device
10
is subjected to a thermal cycle process associated with turning-on and turning-off of the electronic apparatus. Thereby, such a temperature cycle induces a thermal stress in the semiconductor device
10
particularly in correspondence to the part where the bump electrodes
11
A make an electric contact with corresponding wiring patterns on the main substrate
14
, and there is a risk that the contact fails as a result of fatigue.
This problem of fatigue appears conspicuously when the difference in the thermal expansion coefficient between the BGA semiconductor device
10
and the main substrate
14
is large. Further, the problem of foregoing thermal fatigue appears conspicuously when the rigidity is increased for the semiconductor device
10
. Further, the problem of foregoing thermal fatigue appears conspicuously when the lateral size of the semiconductor device
10
, and hence the distance across the outermost bump electrodes on the package substrate
11
is increased.
In view of the fact that the number of input/output terminals is increasing in the advanced high-performance semiconductor devices of these days, the number of the bump electrodes
11
A on the package substrate
11
is now reaching the order of several hundreds to several thousands. Associated with this, the distance across the outermost bump electrodes is also increasing and the reliability of the electrical contact has become a serious problem in these advanced, high-performance semiconductor devices.
FIG. 2
shows another BGA semiconductor device
10
A according to a related art, wherein those parts corresponding to the parts described previously are designated by the same reference numerals and the description thereof will be omitted.
Referring to
FIG. 2
, the BGA semiconductor device
10
A has a similar construction as the BGA semiconductor device
10
of
FIG. 1
, except that the cap member
13
is replaced with a cap member
23
having a reduced thickness. Thereby, the rigidity of the BGA semiconductor device
10
A is reduced as compared with the BGA semiconductor device
10
and the problem of the fatigue of the bump electrodes
11
A is reduced.
On the other hand, in view of the fact that the thickness of the cap member
23
is reduced, the cap member
23
no longer functions as an effective heat sink and the semiconductor device
10
A of
FIG. 2
suffers from the problem of abnormal operation and abnormal temperature rise associated with poor cooling. In the case of the device of
FIG. 1
, the cap member
13
has a thickness of about 2 mm at the top part contacting the semiconductor chip
12
, while the cap member
23
in the semiconductor device
10
A of
FIG. 2
has a thickness of only 0.3 mm.
SUMMARY OF THE INVENTION
Accordingly, it is a general object of the present invention to provide a novel and useful semiconductor device wherein the foregoing problems are eliminated.
Another and more specific object of the present invention is to provide a BGA semiconductor device having a package substrate on which a semiconductor chip is flip-chip mounted, wherein the reliability of contact with an external substrate is improved for the electrode bumps that are provided on the package substrate, while maintaining an excellent heat dissipation performance.
Another object of the present invention is to provide a semiconductor device, comprising:
a package substrate;
a semiconductor chip mounted on a top surface of said package substrate in a face-down state;
a cap member provided on said top surface of said package substrate so as to cover said semiconductor chip, said cap member making a contact with said semiconductor chip and said top surface of said package substrate; and
electrodes provided on a bottom surface of said package substrate,
said cap member having a thermal conductivity not smaller than about 100 W/(m·K) and a Young modulus not exceeding about 20 GPa.
According to the present invention, the rigidity of the semiconductor device as a wh
Imamura Kazuyuki
Kikuchi Atsushi
Minamizawa Masaharu
Shimizu Nobutaka
Armstrong Westerman & Hattori, LLP
Fahmy Wael
Fujitsu Limited
Nguyen DiLinh
LandOfFree
Flip-chip semiconductor device having an improved reliability does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Flip-chip semiconductor device having an improved reliability, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Flip-chip semiconductor device having an improved reliability will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3064074