Flip-chip package with fan-out WLCSP

Active solid-state devices (e.g. – transistors – solid-state diode – Lead frame – With structure for mounting semiconductor chip to lead frame

Reexamination Certificate

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Details

C257S778000, C257SE23141

Reexamination Certificate

active

07838975

ABSTRACT:
A flip-chip package includes a package carrier; a semiconductor die having a die face and a die edge, the semiconductor die being assembled face-down to a chip side of the package carrier, and contact pads are situated on the die face; a rewiring laminate structure between the semiconductor die and the package carrier, the rewiring laminate structure including a re-routed metal layer, and at least a portion of the re-routed metal layer projects beyond the die edge; and bumps arranged on the rewiring laminate structure for electrically connecting the semiconductor die with the package carrier.

REFERENCES:
patent: 6294407 (2001-09-01), Jacobs
patent: 7074649 (2006-07-01), Hedler et al.
patent: 7189593 (2007-03-01), Lee
patent: 7288835 (2007-10-01), Yim
patent: 7354800 (2008-04-01), Carson
patent: 7372141 (2008-05-01), Karnezos
patent: 7489041 (2009-02-01), Akram
patent: 7566966 (2009-07-01), Chow
Tung-Hsien Hsieh, Title: Multi-Chip Package, pending U.S. Appl. No. 12/704,517, filed Feb. 11, 2010.
Tung-Hsien Hsieh et al., Title: Wire Bond Chip Package, pending U.S. Appl. No. 12/485,923, filed Jun. 17, 2009.

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